2023-01-09 06:44:49 -05:00
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/*
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* SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "mspi_timing_tuning_configs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* SPI timing tuning registers.
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* Upper layer rely on these 3 registers to tune the timing.
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*/
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typedef struct {
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uint8_t spi_din_mode; /*!< input signal delay mode*/
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uint8_t spi_din_num; /*!< input signal delay number */
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uint8_t extra_dummy_len; /*!< extra dummy length*/
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} mspi_timing_tuning_param_t;
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typedef struct {
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mspi_timing_tuning_param_t tuning_config_table[MSPI_TIMING_CONFIG_NUM_DEFAULT]; //available timing tuning configs
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uint32_t available_config_num;
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uint32_t default_config_id; //If tuning fails, we use this one as default
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} mspi_timing_config_t;
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/**
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* The SPI FLASH module clock and SPI PSRAM module clock is divided from the SPI core clock, core clock is from system clock:
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*
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* PLL ----| |---- FLASH Module Clock
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* XTAL ----|----> Core Clock ---->|
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* RTC8M ----| |---- PSRAM Module Clock
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*
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*/
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typedef enum {
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MSPI_TIMING_CONFIG_CORE_CLOCK_80M,
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MSPI_TIMING_CONFIG_CORE_CLOCK_120M,
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MSPI_TIMING_CONFIG_CORE_CLOCK_160M,
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MSPI_TIMING_CONFIG_CORE_CLOCK_240M
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} mspi_timing_config_core_clock_t;
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//-------------------------------------- Generic Config APIs --------------------------------------//
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/**
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* @brief Get required core clock, under current sdkconfig (Flash / PSRAM mode, speed, etc.)
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*/
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mspi_timing_config_core_clock_t mspi_timing_config_get_core_clock(void);
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/**
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* @brief Set MSPI core clock
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*
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* @param spi_num SPI0 / 1
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* @param core_clock core clock
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*/
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void mspi_timing_config_set_core_clock(uint8_t spi_num, mspi_timing_config_core_clock_t core_clock);
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/**
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* @brief Set MSPI Flash module clock
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*
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* @param spi_num SPI0 / 1
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* @param freqdiv Freq divider
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*/
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void mspi_timing_config_set_flash_clock(uint8_t spi_num, uint32_t freqdiv);
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/**
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* @brief Set MSPI Flash Din Mode and Din Num
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*
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* @param spi_num SPI0 / 1
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* @param din_mode Din mode
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* @param din_num Din num
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*/
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void mspi_timing_config_flash_set_din_mode_num(uint8_t spi_num, uint8_t din_mode, uint8_t din_num);
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/**
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* @brief Set MSPI Flash extra dummy
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*
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* @param spi_num SPI0 / 1
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* @param extra_dummy extra dummy
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*/
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void mspi_timing_config_flash_set_extra_dummy(uint8_t spi_num, uint8_t extra_dummy);
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/**
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* @brief Configure Flash to read data via SPI1
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*
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* @param buf buffer
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* @param addr address
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* @param len length
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*/
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void mspi_timing_config_flash_read_data(uint8_t *buf, uint32_t addr, uint32_t len);
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/**
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* @brief Set MSPI PSRAM module clock
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*
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* @param spi_num SPI0 / 1
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* @param freqdiv Freq divider
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*/
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void mspi_timing_config_set_psram_clock(uint8_t spi_num, uint32_t freqdiv);
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/**
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* @brief Set MSPI PSRAM Din Mode and Din Num
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*
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* @param spi_num SPI0 / 1
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* @param din_mode Din mode
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* @param din_num Din num
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*/
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void mspi_timing_config_psram_set_din_mode_num(uint8_t spi_num, uint8_t din_mode, uint8_t din_num);
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/**
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* @brief Set MSPI PSRAM extra dummy
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*
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* @param spi_num SPI0 / 1
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* @param extra_dummy extra dummy
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*/
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void mspi_timing_config_psram_set_extra_dummy(uint8_t spi_num, uint8_t extra_dummy);
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/**
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* @brief Configure PSRAM to write data via SPI1
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*
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* @param buf buffer
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* @param addr address
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* @param len length
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*/
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void mspi_timing_config_psram_write_data(uint8_t *buf, uint32_t addr, uint32_t len);
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/**
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* @brief Configure PSRAM to read data via SPI1
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*
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* @param buf buffer
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* @param addr address
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* @param len length
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*/
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void mspi_timing_config_psram_read_data(uint8_t *buf, uint32_t addr, uint32_t len);
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/*-------------------------------------------------------------------------------------------------
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* SPI1 Timing Tuning APIs
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2023-03-28 05:03:47 -04:00
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*
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* These APIs are only used in `mspi_timing_tuning.c` for configuring SPI1 timing
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* tuning related registers to find best tuning parameter for Flash and PSRAM
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2023-01-09 06:44:49 -05:00
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*-------------------------------------------------------------------------------------------------*/
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/**
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2023-03-28 05:03:47 -04:00
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* @brief Tune Flash timing registers for SPI1 accessing Flash
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*
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* @param[in] params Timing parameters
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2023-01-09 06:44:49 -05:00
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*/
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2023-03-28 05:03:47 -04:00
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void mspi_timing_config_flash_set_tuning_regs(const mspi_timing_tuning_param_t *params);
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2023-01-09 06:44:49 -05:00
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/**
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2023-03-28 05:03:47 -04:00
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* @brief Tune PSRAM timing registers for SPI1 accessing PSRAM
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*
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* @param[in] params Timing parameters
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2023-01-09 06:44:49 -05:00
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*/
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2023-03-28 05:03:47 -04:00
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void mspi_timing_config_psram_set_tuning_regs(const mspi_timing_tuning_param_t *params);
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2023-01-09 06:44:49 -05:00
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2023-03-28 05:03:47 -04:00
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/*-------------------------------------------------------------------------------------------------
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* APIs for coordination with ESP Flash driver
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*-------------------------------------------------------------------------------------------------*/
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2023-01-09 06:44:49 -05:00
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/**
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2023-03-28 05:03:47 -04:00
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* SPI1 register info get APIs. These APIs inform `mspi_timing_tuning.c` (driver layer) of the SPI1 flash settings.
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* In this way, other components (e.g.: esp_flash driver) can get the info from it (`mspi_timing_tuning.c`).
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2023-01-09 06:44:49 -05:00
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*/
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/**
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2023-03-28 05:03:47 -04:00
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* @brief Get CS timing
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*
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* @param[out] setup_time Setup time
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* @param[out] hold_time Hold time
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2023-01-09 06:44:49 -05:00
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*/
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void mspi_timing_config_get_cs_timing(uint8_t *setup_time, uint32_t *hold_time);
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/**
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* @brief Get Flash clock reg val
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2023-03-28 05:03:47 -04:00
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*
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* @return Flash clock reg val
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2023-01-09 06:44:49 -05:00
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*/
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uint32_t mspi_timing_config_get_flash_clock_reg(void);
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#ifdef __cplusplus
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}
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#endif
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