2018-10-19 09:51:27 -04:00
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/*
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* FreeModbus Libary: A portable Modbus implementation for Modbus ASCII/RTU.
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* Copyright (C) 2013 Armink <armink.ztl@gmail.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* File: $Id: mbfunccoils_m.c,v 1.60 2013/10/12 15:10:12 Armink Add Master Functions
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*/
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/* ----------------------- System includes ----------------------------------*/
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#include "stdlib.h"
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#include "string.h"
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/* ----------------------- Platform includes --------------------------------*/
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#include "port.h"
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/* ----------------------- Modbus includes ----------------------------------*/
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#include "mb_m.h"
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#include "mbframe.h"
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#include "mbproto.h"
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#include "mbconfig.h"
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#include "mbutils.h"
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/* ----------------------- Defines ------------------------------------------*/
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#define MB_PDU_REQ_READ_ADDR_OFF ( MB_PDU_DATA_OFF + 0 )
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#define MB_PDU_REQ_READ_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 )
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#define MB_PDU_REQ_READ_SIZE ( 4 )
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#define MB_PDU_FUNC_READ_COILCNT_OFF ( MB_PDU_DATA_OFF + 0 )
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#define MB_PDU_FUNC_READ_VALUES_OFF ( MB_PDU_DATA_OFF + 1 )
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#define MB_PDU_FUNC_READ_SIZE_MIN ( 1 )
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#define MB_PDU_REQ_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF )
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#define MB_PDU_REQ_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 )
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#define MB_PDU_REQ_WRITE_SIZE ( 4 )
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#define MB_PDU_FUNC_WRITE_ADDR_OFF ( MB_PDU_DATA_OFF )
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#define MB_PDU_FUNC_WRITE_VALUE_OFF ( MB_PDU_DATA_OFF + 2 )
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#define MB_PDU_FUNC_WRITE_SIZE ( 4 )
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#define MB_PDU_REQ_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF )
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#define MB_PDU_REQ_WRITE_MUL_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 )
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#define MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF ( MB_PDU_DATA_OFF + 4 )
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#define MB_PDU_REQ_WRITE_MUL_VALUES_OFF ( MB_PDU_DATA_OFF + 5 )
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#define MB_PDU_REQ_WRITE_MUL_SIZE_MIN ( 5 )
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#define MB_PDU_REQ_WRITE_MUL_COILCNT_MAX ( 0x07B0 )
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#define MB_PDU_FUNC_WRITE_MUL_ADDR_OFF ( MB_PDU_DATA_OFF )
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#define MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF ( MB_PDU_DATA_OFF + 2 )
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#define MB_PDU_FUNC_WRITE_MUL_SIZE ( 5 )
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/* ----------------------- Static functions ---------------------------------*/
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eMBException prveMBError2Exception( eMBErrorCode eErrorCode );
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/* ----------------------- Start implementation -----------------------------*/
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2020-07-21 12:34:04 -04:00
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#if MB_MASTER_RTU_ENABLED || MB_MASTER_ASCII_ENABLED || MB_MASTER_TCP_ENABLED
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2019-11-26 00:16:25 -05:00
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#if MB_FUNC_READ_COILS_ENABLED
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2018-10-19 09:51:27 -04:00
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/**
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* This function will request read coil.
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*
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* @param ucSndAddr salve address
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* @param usCoilAddr coil start address
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* @param usNCoils coil total number
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* @param lTimeOut timeout (-1 will waiting forever)
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*
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* @return error code
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*/
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eMBMasterReqErrCode
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eMBMasterReqReadCoils( UCHAR ucSndAddr, USHORT usCoilAddr, USHORT usNCoils, LONG lTimeOut )
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{
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UCHAR *ucMBFrame;
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eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR;
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if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG;
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else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY;
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else
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{
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vMBMasterGetPDUSndBuf(&ucMBFrame);
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vMBMasterSetDestAddress(ucSndAddr);
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ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_READ_COILS;
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ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF] = usCoilAddr >> 8;
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ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF + 1] = usCoilAddr;
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ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF ] = usNCoils >> 8;
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ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF + 1] = usNCoils;
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vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_READ_SIZE );
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2019-11-26 00:16:25 -05:00
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( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_TRANSMIT );
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2018-10-19 09:51:27 -04:00
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eErrStatus = eMBMasterWaitRequestFinish( );
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}
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return eErrStatus;
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}
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eMBException
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eMBMasterFuncReadCoils( UCHAR * pucFrame, USHORT * usLen )
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{
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UCHAR *ucMBFrame;
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USHORT usRegAddress;
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USHORT usCoilCount;
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UCHAR ucByteCount;
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eMBException eStatus = MB_EX_NONE;
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eMBErrorCode eRegStatus;
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/* If this request is broadcast, and it's read mode. This request don't need execute. */
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if ( xMBMasterRequestIsBroadcast() )
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{
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eStatus = MB_EX_NONE;
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}
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else if ( *usLen >= MB_PDU_SIZE_MIN + MB_PDU_FUNC_READ_SIZE_MIN )
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{
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vMBMasterGetPDUSndBuf(&ucMBFrame);
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usRegAddress = ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF] << 8 );
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usRegAddress |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_ADDR_OFF + 1] );
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usRegAddress++;
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usCoilCount = ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF] << 8 );
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usCoilCount |= ( USHORT )( ucMBFrame[MB_PDU_REQ_READ_COILCNT_OFF + 1] );
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/* Test if the quantity of coils is a multiple of 8. If not last
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* byte is only partially field with unused coils set to zero. */
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if( ( usCoilCount & 0x0007 ) != 0 )
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{
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ucByteCount = ( UCHAR )( usCoilCount / 8 + 1 );
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}
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else
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{
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ucByteCount = ( UCHAR )( usCoilCount / 8 );
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}
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/* Check if the number of registers to read is valid. If not
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* return Modbus illegal data value exception.
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*/
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if( ( usCoilCount >= 1 ) &&
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( ucByteCount == pucFrame[MB_PDU_FUNC_READ_COILCNT_OFF] ) )
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{
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/* Make callback to fill the buffer. */
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eRegStatus = eMBMasterRegCoilsCB( &pucFrame[MB_PDU_FUNC_READ_VALUES_OFF], usRegAddress, usCoilCount, MB_REG_READ );
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/* If an error occurred convert it into a Modbus exception. */
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if( eRegStatus != MB_ENOERR )
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{
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eStatus = prveMBError2Exception( eRegStatus );
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}
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}
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else
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{
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eStatus = MB_EX_ILLEGAL_DATA_VALUE;
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}
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}
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else
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{
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/* Can't be a valid read coil register request because the length
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* is incorrect. */
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eStatus = MB_EX_ILLEGAL_DATA_VALUE;
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}
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return eStatus;
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}
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#endif
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#if MB_FUNC_WRITE_COIL_ENABLED > 0
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/**
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* This function will request write one coil.
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*
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* @param ucSndAddr salve address
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* @param usCoilAddr coil start address
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* @param usCoilData data to be written
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* @param lTimeOut timeout (-1 will waiting forever)
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*
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* @return error code
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*
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* @see eMBMasterReqWriteMultipleCoils
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*/
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eMBMasterReqErrCode
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eMBMasterReqWriteCoil( UCHAR ucSndAddr, USHORT usCoilAddr, USHORT usCoilData, LONG lTimeOut )
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{
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UCHAR *ucMBFrame;
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eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR;
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if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG;
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else if ( ( usCoilData != 0xFF00 ) && ( usCoilData != 0x0000 ) ) eErrStatus = MB_MRE_ILL_ARG;
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else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY;
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else
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{
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vMBMasterGetPDUSndBuf(&ucMBFrame);
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vMBMasterSetDestAddress(ucSndAddr);
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ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_WRITE_SINGLE_COIL;
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ucMBFrame[MB_PDU_REQ_WRITE_ADDR_OFF] = usCoilAddr >> 8;
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ucMBFrame[MB_PDU_REQ_WRITE_ADDR_OFF + 1] = usCoilAddr;
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ucMBFrame[MB_PDU_REQ_WRITE_VALUE_OFF ] = usCoilData >> 8;
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ucMBFrame[MB_PDU_REQ_WRITE_VALUE_OFF + 1] = usCoilData;
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vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_WRITE_SIZE );
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2019-11-26 00:16:25 -05:00
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( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_TRANSMIT );
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2018-10-19 09:51:27 -04:00
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eErrStatus = eMBMasterWaitRequestFinish( );
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}
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return eErrStatus;
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}
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eMBException
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eMBMasterFuncWriteCoil( UCHAR * pucFrame, USHORT * usLen )
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{
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USHORT usRegAddress;
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UCHAR ucBuf[2];
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eMBException eStatus = MB_EX_NONE;
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eMBErrorCode eRegStatus;
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if( *usLen == ( MB_PDU_FUNC_WRITE_SIZE + MB_PDU_SIZE_MIN ) )
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{
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usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF] << 8 );
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usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_ADDR_OFF + 1] );
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usRegAddress++;
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if( ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF + 1] == 0x00 ) &&
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( ( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0xFF ) ||
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( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0x00 ) ) )
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{
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ucBuf[1] = 0;
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if( pucFrame[MB_PDU_FUNC_WRITE_VALUE_OFF] == 0xFF )
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{
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ucBuf[0] = 1;
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}
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else
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{
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ucBuf[0] = 0;
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}
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eRegStatus =
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eMBMasterRegCoilsCB( &ucBuf[0], usRegAddress, 1, MB_REG_WRITE );
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/* If an error occured convert it into a Modbus exception. */
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if( eRegStatus != MB_ENOERR )
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{
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eStatus = prveMBError2Exception( eRegStatus );
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}
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}
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else
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{
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eStatus = MB_EX_ILLEGAL_DATA_VALUE;
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}
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}
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else
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{
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/* Can't be a valid write coil register request because the length
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* is incorrect. */
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eStatus = MB_EX_ILLEGAL_DATA_VALUE;
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}
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return eStatus;
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}
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#endif // #if MB_FUNC_WRITE_COIL_ENABLED > 0
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#if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0
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/**
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* This function will request write multiple coils.
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*
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* @param ucSndAddr salve address
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* @param usCoilAddr coil start address
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* @param usNCoils coil total number
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* @param usCoilData data to be written
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* @param lTimeOut timeout (-1 will waiting forever)
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*
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* @return error code
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*
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* @see eMBMasterReqWriteCoil
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*/
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eMBMasterReqErrCode
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eMBMasterReqWriteMultipleCoils( UCHAR ucSndAddr,
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USHORT usCoilAddr, USHORT usNCoils, UCHAR * pucDataBuffer, LONG lTimeOut)
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{
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UCHAR *ucMBFrame;
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USHORT usRegIndex = 0;
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UCHAR ucByteCount;
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eMBMasterReqErrCode eErrStatus = MB_MRE_NO_ERR;
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if ( ucSndAddr > MB_MASTER_TOTAL_SLAVE_NUM ) eErrStatus = MB_MRE_ILL_ARG;
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else if ( usNCoils > MB_PDU_REQ_WRITE_MUL_COILCNT_MAX ) eErrStatus = MB_MRE_ILL_ARG;
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else if ( xMBMasterRunResTake( lTimeOut ) == FALSE ) eErrStatus = MB_MRE_MASTER_BUSY;
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else
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{
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vMBMasterGetPDUSndBuf(&ucMBFrame);
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vMBMasterSetDestAddress(ucSndAddr);
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ucMBFrame[MB_PDU_FUNC_OFF] = MB_FUNC_WRITE_MULTIPLE_COILS;
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ucMBFrame[MB_PDU_REQ_WRITE_MUL_ADDR_OFF] = usCoilAddr >> 8;
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ucMBFrame[MB_PDU_REQ_WRITE_MUL_ADDR_OFF + 1] = usCoilAddr;
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ucMBFrame[MB_PDU_REQ_WRITE_MUL_COILCNT_OFF] = usNCoils >> 8;
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ucMBFrame[MB_PDU_REQ_WRITE_MUL_COILCNT_OFF + 1] = usNCoils ;
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if( ( usNCoils & 0x0007 ) != 0 )
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{
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ucByteCount = ( UCHAR )( usNCoils / 8 + 1 );
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}
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else
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{
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ucByteCount = ( UCHAR )( usNCoils / 8 );
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}
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ucMBFrame[MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF] = ucByteCount;
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ucMBFrame += MB_PDU_REQ_WRITE_MUL_VALUES_OFF;
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while( ucByteCount > usRegIndex)
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{
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*ucMBFrame++ = pucDataBuffer[usRegIndex++];
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}
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vMBMasterSetPDUSndLength( MB_PDU_SIZE_MIN + MB_PDU_REQ_WRITE_MUL_SIZE_MIN + ucByteCount );
|
2019-11-26 00:16:25 -05:00
|
|
|
( void ) xMBMasterPortEventPost( EV_MASTER_FRAME_TRANSMIT );
|
2018-10-19 09:51:27 -04:00
|
|
|
eErrStatus = eMBMasterWaitRequestFinish( );
|
|
|
|
}
|
|
|
|
return eErrStatus;
|
|
|
|
}
|
|
|
|
|
|
|
|
eMBException
|
|
|
|
eMBMasterFuncWriteMultipleCoils( UCHAR * pucFrame, USHORT * usLen )
|
|
|
|
{
|
|
|
|
USHORT usRegAddress;
|
|
|
|
USHORT usCoilCnt;
|
|
|
|
UCHAR ucByteCount;
|
|
|
|
UCHAR ucByteCountVerify;
|
|
|
|
UCHAR *ucMBFrame;
|
|
|
|
|
|
|
|
eMBException eStatus = MB_EX_NONE;
|
|
|
|
eMBErrorCode eRegStatus;
|
|
|
|
|
|
|
|
/* If this request is broadcast, the *usLen is not need check. */
|
|
|
|
if( ( *usLen == MB_PDU_FUNC_WRITE_MUL_SIZE ) || xMBMasterRequestIsBroadcast() )
|
|
|
|
{
|
|
|
|
vMBMasterGetPDUSndBuf(&ucMBFrame);
|
|
|
|
usRegAddress = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF] << 8 );
|
|
|
|
usRegAddress |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_ADDR_OFF + 1] );
|
|
|
|
usRegAddress++;
|
|
|
|
|
|
|
|
usCoilCnt = ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF] << 8 );
|
|
|
|
usCoilCnt |= ( USHORT )( pucFrame[MB_PDU_FUNC_WRITE_MUL_COILCNT_OFF + 1] );
|
|
|
|
|
|
|
|
ucByteCount = ucMBFrame[MB_PDU_REQ_WRITE_MUL_BYTECNT_OFF];
|
|
|
|
|
|
|
|
/* Compute the number of expected bytes in the request. */
|
|
|
|
if( ( usCoilCnt & 0x0007 ) != 0 )
|
|
|
|
{
|
|
|
|
ucByteCountVerify = ( UCHAR )( usCoilCnt / 8 + 1 );
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
ucByteCountVerify = ( UCHAR )( usCoilCnt / 8 );
|
|
|
|
}
|
|
|
|
|
|
|
|
if( ( usCoilCnt >= 1 ) && ( ucByteCountVerify == ucByteCount ) )
|
|
|
|
{
|
|
|
|
eRegStatus =
|
|
|
|
eMBMasterRegCoilsCB( &ucMBFrame[MB_PDU_REQ_WRITE_MUL_VALUES_OFF],
|
|
|
|
usRegAddress, usCoilCnt, MB_REG_WRITE );
|
|
|
|
|
|
|
|
/* If an error occured convert it into a Modbus exception. */
|
|
|
|
if( eRegStatus != MB_ENOERR )
|
|
|
|
{
|
|
|
|
eStatus = prveMBError2Exception( eRegStatus );
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
eStatus = MB_EX_ILLEGAL_DATA_VALUE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Can't be a valid write coil register request because the length
|
|
|
|
* is incorrect. */
|
|
|
|
eStatus = MB_EX_ILLEGAL_DATA_VALUE;
|
|
|
|
}
|
|
|
|
return eStatus;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif // #if MB_FUNC_WRITE_MULTIPLE_COILS_ENABLED > 0
|
|
|
|
#endif // #if MB_MASTER_RTU_ENABLED > 0 || MB_MASTER_ASCII_ENABLED > 0
|