2022-07-12 08:28:06 -04:00
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* ROM function interface esp32c6.rom.phy.ld for esp32c6
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*
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*
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2022-09-28 02:24:31 -04:00
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* Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
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2022-07-12 08:28:06 -04:00
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*
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* Compatible with ROM where ECO version equal or greater to 0.
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*
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* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
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*/
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/***************************************
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Group rom_phy
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***************************************/
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/* Functions */
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2022-09-28 02:24:31 -04:00
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phy_param_addr = 0x40001104;
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phy_get_romfuncs = 0x40001108;
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chip761_phyrom_version = 0x4000110c;
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chip761_phyrom_version_num = 0x40001110;
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get_rc_dout = 0x40001114;
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rc_cal = 0x40001118;
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rom_enter_critical_phy = 0x4000111c;
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rom_exit_critical_phy = 0x40001120;
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rom_set_chan_cal_interp = 0x40001124;
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rom_loopback_mode_en = 0x40001128;
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rom_bb_bss_cbw40 = 0x4000112c;
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abs_temp = 0x40001130;
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get_data_sat = 0x40001134;
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phy_byte_to_word = 0x40001138;
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set_chan_reg = 0x4000113c;
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i2c_master_reset = 0x40001140;
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rom_set_chan_freq_sw_start = 0x40001144;
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freq_module_resetn = 0x40001148;
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freq_chan_en_sw = 0x4000114c;
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write_chan_freq = 0x40001150;
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get_freq_mem_param = 0x40001154;
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get_freq_mem_addr = 0x40001158;
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bt_txpwr_freq = 0x4000115c;
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wr_rf_freq_mem = 0x40001160;
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read_rf_freq_mem = 0x40001164;
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freq_i2c_mem_write = 0x40001168;
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freq_num_get_data = 0x4000116c;
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freq_i2c_num_addr = 0x40001170;
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freq_i2c_write_set = 0x40001174;
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pll_dac_mem_update = 0x40001178;
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pll_cap_mem_update = 0x4000117c;
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get_rf_freq_cap = 0x40001180;
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get_rf_freq_init = 0x40001184;
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phy_en_hw_set_freq = 0x40001188;
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phy_dis_hw_set_freq = 0x4000118c;
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rom_pwdet_sar2_init = 0x40001190;
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rom_en_pwdet = 0x40001194;
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rom_get_sar_sig_ref = 0x40001198;
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rom_pwdet_tone_start = 0x4000119c;
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rom_pwdet_wait_idle = 0x400011a0;
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rom_read_sar_dout = 0x400011a4;
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get_tone_sar_dout = 0x400011a8;
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get_fm_sar_dout = 0x400011ac;
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txtone_linear_pwr = 0x400011b0;
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linear_to_db = 0x400011b4;
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get_power_db = 0x400011b8;
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meas_tone_pwr_db = 0x400011bc;
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pkdet_vol_start = 0x400011c0;
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read_sar2_code = 0x400011c4;
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get_sar2_vol = 0x400011c8;
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get_pll_vol = 0x400011cc;
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tx_pwctrl_bg_init = 0x400011d0;
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phy_pwdet_always_en = 0x400011d4;
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phy_pwdet_onetime_en = 0x400011d8;
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esp_tx_state_out_rom = 0x400011dc;
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ant_dft_cfg_rom = 0x400011e0;
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ant_wifitx_cfg_rom = 0x400011e4;
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ant_wifirx_cfg_rom = 0x400011e8;
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ant_bttx_cfg_rom = 0x400011ec;
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ant_btrx_cfg_rom = 0x400011f0;
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phy_chan_dump_cfg_rom = 0x400011f4;
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phy_enable_low_rate = 0x400011f8;
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phy_disable_low_rate = 0x400011fc;
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phy_is_low_rate_enabled = 0x40001200;
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phy_dig_reg_backup_rom = 0x40001204;
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phy_chan_filt_set_rom = 0x40001208;
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phy_rx11blr_cfg = 0x4000120c;
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set_cca_rom = 0x40001210;
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set_rx_sense_rom = 0x40001214;
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rx_gain_force_rom = 0x40001218;
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rom_rfpll_set_freq = 0x4000121c;
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mhz2ieee = 0x40001220;
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chan_to_freq = 0x40001224;
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restart_cal = 0x40001228;
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write_rfpll_sdm = 0x4000122c;
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wait_rfpll_cal_end = 0x40001230;
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set_rf_freq_offset = 0x40001234;
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set_rfpll_freq = 0x40001238;
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set_channel_rfpll_freq = 0x4000123c;
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rfpll_cap_correct = 0x40001240;
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rfpll_cap_init_cal = 0x40001244;
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write_pll_cap = 0x40001248;
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read_pll_cap = 0x4000124c;
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chip_v7_set_chan_ana = 0x40001250;
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freq_set_reg = 0x40001254;
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gen_rx_gain_table = 0x40001258;
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bt_txdc_cal = 0x4000125c;
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bt_txiq_cal = 0x40001260;
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txiq_cal_init = 0x40001264;
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txdc_cal_init = 0x40001268;
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txdc_cal = 0x4000126c;
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txiq_get_mis_pwr = 0x40001270;
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txiq_cover = 0x40001274;
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rfcal_txiq = 0x40001278;
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get_power_atten = 0x4000127c;
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pwdet_ref_code = 0x40001280;
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pwdet_code_cal = 0x40001284;
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rfcal_txcap = 0x40001288;
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tx_cap_init = 0x4000128c;
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rfcal_pwrctrl = 0x40001290;
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tx_pwctrl_init_cal = 0x40001294;
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tx_pwctrl_init = 0x40001298;
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bt_tx_pwctrl_init = 0x4000129c;
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rom_i2c_enter_critical = 0x400012a0;
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rom_i2c_exit_critical = 0x400012a4;
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rom_get_i2c_read_mask = 0x400012a8;
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rom_get_i2c_mst0_mask = 0x400012ac;
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rom_get_i2c_hostid = 0x400012b0;
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rom_chip_i2c_readReg_org = 0x400012b4;
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rom_chip_i2c_readReg = 0x400012b8;
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rom_i2c_readReg = 0x400012bc;
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rom_chip_i2c_writeReg = 0x400012c0;
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rom_i2c_writeReg = 0x400012c4;
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rom_i2c_readReg_Mask = 0x400012c8;
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rom_i2c_writeReg_Mask = 0x400012cc;
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rom_set_txcap_reg = 0x400012d0;
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i2c_paral_set_mst0 = 0x400012d4;
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i2c_paral_set_read = 0x400012d8;
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i2c_paral_read = 0x400012dc;
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i2c_paral_write = 0x400012e0;
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i2c_paral_write_num = 0x400012e4;
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i2c_paral_write_mask = 0x400012e8;
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i2c_sar2_init_code = 0x400012ec;
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rom_pbus_force_mode = 0x400012f0;
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rom_pbus_rd_addr = 0x400012f4;
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rom_pbus_rd_shift = 0x400012f8;
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rom_pbus_force_test = 0x400012fc;
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rom_pbus_rd = 0x40001300;
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rom_pbus_set_rxgain = 0x40001304;
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rom_pbus_xpd_rx_off = 0x40001308;
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rom_pbus_xpd_rx_on = 0x4000130c;
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rom_pbus_xpd_tx_off = 0x40001310;
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rom_pbus_xpd_tx_on = 0x40001314;
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rom_set_loopback_gain = 0x40001318;
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rom_txcal_debuge_mode = 0x4000131c;
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pbus_debugmode = 0x40001320;
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pbus_workmode = 0x40001324;
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pbus_set_dco = 0x40001328;
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txcal_work_mode = 0x4000132c;
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rom_start_tx_tone_step = 0x40001330;
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rom_stop_tx_tone = 0x40001334;
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disable_agc = 0x40001338;
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enable_agc = 0x4000133c;
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phy_disable_cca = 0x40001340;
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phy_enable_cca = 0x40001344;
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write_gain_mem = 0x40001348;
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bb_bss_cbw40_dig = 0x4000134c;
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cbw2040_cfg = 0x40001350;
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mac_tx_chan_offset = 0x40001354;
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tx_paon_set = 0x40001358;
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pwdet_reg_init = 0x4000135c;
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i2cmst_reg_init = 0x40001360;
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bt_gain_offset = 0x40001364;
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fe_reg_init = 0x40001368;
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mac_enable_bb = 0x4000136c;
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bb_wdg_cfg = 0x40001370;
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fe_txrx_reset = 0x40001374;
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set_rx_comp = 0x40001378;
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agc_reg_init = 0x4000137c;
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bb_reg_init = 0x40001380;
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open_i2c_xpd = 0x40001384;
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txiq_set_reg = 0x40001388;
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rxiq_set_reg = 0x4000138c;
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set_txclk_en = 0x40001390;
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set_rxclk_en = 0x40001394;
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bb_wdg_test_en = 0x40001398;
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noise_floor_auto_set = 0x4000139c;
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read_hw_noisefloor = 0x400013a0;
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iq_corr_enable = 0x400013a4;
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wifi_agc_sat_gain = 0x400013a8;
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phy_bbpll_cal = 0x400013ac;
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phy_ant_init = 0x400013b0;
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phy_set_bbfreq_init = 0x400013b4;
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wifi_fbw_sel = 0x400013b8;
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bt_filter_reg = 0x400013bc;
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phy_rx_sense_set = 0x400013c0;
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tx_state_set = 0x400013c4;
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phy_close_pa = 0x400013c8;
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phy_freq_correct = 0x400013cc;
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set_pbus_reg = 0x400013d0;
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wifi_rifs_mode_en = 0x400013d4;
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nrx_freq_set = 0x400013d8;
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fe_adc_on = 0x400013dc;
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phy_force_pwr_index = 0x400013e0;
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rom_iq_est_enable = 0x400013e4;
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rom_iq_est_disable = 0x400013e8;
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rom_bb_gain_index = 0x400013ec;
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rom_rfrx_gain_index = 0x400013f0;
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dc_iq_est = 0x400013f4;
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set_cal_rxdc = 0x400013f8;
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rxiq_get_mis = 0x400013fc;
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rxiq_cover_mg_mp = 0x40001400;
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rfcal_rxiq = 0x40001404;
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get_rfcal_rxiq_data = 0x40001408;
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get_dco_comp = 0x4000140c;
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pbus_rx_dco_cal = 0x40001410;
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rxdc_est_min = 0x40001414;
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pbus_rx_dco_cal_1step = 0x40001418;
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set_lb_txiq = 0x4000141c;
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set_rx_gain_cal_iq = 0x40001420;
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set_rx_gain_cal_dc = 0x40001424;
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spur_reg_write_one_tone = 0x40001428;
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spur_cal = 0x4000142c;
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spur_coef_cfg = 0x40001430;
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tsens_power_up = 0x40001434;
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tsens_read_init = 0x40001438;
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code_to_temp = 0x4000143c;
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tsens_index_to_dac = 0x40001440;
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tsens_index_to_offset = 0x40001444;
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tsens_dac_cal = 0x40001448;
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tsens_code_read = 0x4000144c;
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tsens_temp_read = 0x40001450;
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temp_to_power = 0x40001454;
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get_temp_init = 0x40001458;
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txbbgain_to_index = 0x4000145c;
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index_to_txbbgain = 0x40001460;
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bt_index_to_bb = 0x40001464;
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bt_bb_to_index = 0x40001468;
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bt_get_tx_gain = 0x4000146c;
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dig_gain_check = 0x40001470;
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wifi_get_tx_gain = 0x40001474;
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wifi_11g_rate_chg = 0x40001478;
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bt_chan_pwr_interp = 0x4000147c;
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get_rate_fcc_index = 0x40001480;
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get_chan_target_power = 0x40001484;
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get_tx_gain_value = 0x40001488;
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wifi_get_target_power = 0x4000148c;
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2022-07-12 08:28:06 -04:00
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/* Data (.data, .bss, .rodata) */
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2022-09-28 02:24:31 -04:00
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phy_param_rom = 0x4087fce8;
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