2019-04-17 08:19:44 -04:00
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// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*******************************************************************************
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* NOTICE
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* The hal is not public api, don't use in application code.
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* See readme.md in soc/include/hal/readme.md
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******************************************************************************/
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// The HAL layer for UART.
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// There is no parameter check in the hal layer, so the caller must ensure the correctness of the parameters.
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "hal/uart_ll.h"
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#include "hal/uart_types.h"
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/**
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* Context that should be maintained by both the driver and the HAL
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*/
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typedef struct {
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uart_dev_t *dev;
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} uart_hal_context_t;
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/**
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* @brief Clear the UART interrupt status
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*
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* @param hal Context of the HAL layer
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* @param mask The interrupt status mask to be cleared. Using the ORred mask of `UART_INTR_RXFIFO_FULL ... UART_INTR_CMD_CHAR_DET`
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*
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* @return None
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*/
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#define uart_hal_clr_intsts_mask(hal, mask) uart_ll_clr_intsts_mask((hal)->dev, mask)
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/**
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* @brief Disable the UART interrupt
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*
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* @param hal Context of the HAL layer
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* @param mask The interrupt mask to be disabled. Using the ORred mask of `UART_INTR_RXFIFO_FULL ... UART_INTR_CMD_CHAR_DET`
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*
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* @return None
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*/
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#define uart_hal_disable_intr_mask(hal, mask) uart_ll_disable_intr_mask((hal)->dev, mask)
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/**
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* @brief Enable the UART interrupt
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*
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* @param hal Context of the HAL layer
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* @param mask The UART interrupt mask to be enabled. Using the ORred mask of `UART_INTR_RXFIFO_FULL ... UART_INTR_CMD_CHAR_DET`
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*
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* @return None
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*/
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#define uart_hal_ena_intr_mask(hal, mask) uart_ll_ena_intr_mask((hal)->dev, mask)
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/**
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* @brief Get the UART interrupt status
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*
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* @param hal Context of the HAL layer
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*
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* @return UART interrupt status
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*/
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#define uart_hal_get_intsts_mask(hal) uart_ll_get_intsts_mask((hal)->dev)
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2019-11-18 08:36:40 -05:00
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/**
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* @brief Get status of enabled interrupt
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*
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* @param hal Context of the HAL layer
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*
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* @return UART Interrupt enabled value
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*/
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#define uart_hal_get_intr_ena_status(hal) uart_ll_get_intr_ena_status((hal)->dev)
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2019-04-17 08:19:44 -04:00
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/**
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* @brief Get the UART pattern char configuration
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*
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* @param hal Context of the HAL layer
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* @param cmd_char Pointer to accept UART AT cmd char
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* @param char_num Pointer to accept the `UART_CHAR_NUM` configuration
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*
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* @return None
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*/
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#define uart_hal_get_at_cmd_char(hal, cmd_char, char_num) uart_ll_get_at_cmd_char((hal)->dev, cmd_char, char_num)
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/**
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* @brief Set the UART rst signal active level
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*
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* @param hal Context of the HAL layer
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* @param active_level The rts active level. The active level is low if set to 0. The active level is high if set to 1
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*
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* @return None
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*/
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#define uart_hal_set_rts(hal, active_level) uart_ll_set_rts_active_level((hal)->dev, active_level)
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/**
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* @brief Get the txfifo writeable length(in byte)
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*
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* @param hal Context of the HAL layer
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*
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* @return UART txfifo writeable length
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*/
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#define uart_hal_get_txfifo_len(hal) uart_ll_get_txfifo_len((hal)->dev)
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/**
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* @brief Check if the UART sending state machine is in the IDLE state.
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*
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* @param hal Context of the HAL layer
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*
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* @return True if the state machine is in the IDLE state, otherwise false will be returned.
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*/
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#define uart_hal_is_tx_idle(hal) uart_ll_is_tx_idle((hal)->dev)
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/**
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* @brief Read data from the UART rxfifo
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*
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2021-05-09 23:41:02 -04:00
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* @param[in] hal Context of the HAL layer
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* @param[in] buf Pointer to the buffer used to store the read data. The buffer size should be large than 128 bytes
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* @param[inout] inout_rd_len As input, the size of output buffer to read (set to 0 to read all available data).
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* As output, returns the actual size written into the output buffer.
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2019-04-17 08:19:44 -04:00
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*
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* @return None
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*/
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2021-05-09 23:41:02 -04:00
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void uart_hal_read_rxfifo(uart_hal_context_t *hal, uint8_t *buf, int *inout_rd_len);
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2019-04-17 08:19:44 -04:00
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/**
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* @brief Write data into the UART txfifo
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*
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* @param hal Context of the HAL layer
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* @param buf Pointer of the data buffer need to be written to txfifo
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* @param data_size The data size(in byte) need to be written
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* @param write_size The size has been written
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*
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* @return None
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*/
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void uart_hal_write_txfifo(uart_hal_context_t *hal, const uint8_t *buf, uint32_t data_size, uint32_t *write_size);
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/**
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* @brief Reset the UART txfifo
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void uart_hal_txfifo_rst(uart_hal_context_t *hal);
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/**
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* @brief Reset the UART rxfifo
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*
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* @param hal Context of the HAL layer
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*
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* @return None
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*/
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void uart_hal_rxfifo_rst(uart_hal_context_t *hal);
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/**
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* @brief Init the UART hal and set the UART to the default configuration.
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*
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* @param hal Context of the HAL layer
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* @param uart_num The uart port number, the max port number is (UART_NUM_MAX -1)
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*
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* @return None
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*/
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void uart_hal_init(uart_hal_context_t *hal, uart_port_t uart_num);
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/**
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* @brief Configure the UART baud-rate and select the source clock
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*
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* @param hal Context of the HAL layer
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* @param source_clk The UART source clock. Support `UART_SCLK_REF_TICK` and `UART_SCLK_APB`
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* @param baud_rate The baud-rate to be set
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*
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* @return None
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*/
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void uart_hal_set_baudrate(uart_hal_context_t *hal, uart_sclk_t source_clk, uint32_t baud_rate);
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/**
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* @brief Configure the UART stop bit
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*
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* @param hal Context of the HAL layer
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* @param stop_bit The stop bit to be set
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*
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* @return None
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*/
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void uart_hal_set_stop_bits(uart_hal_context_t *hal, uart_stop_bits_t stop_bit);
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/**
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* @brief Configure the UART data bit
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*
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* @param hal Context of the HAL layer
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* @param data_bit The data bit to be set
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*
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* @return None
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*/
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void uart_hal_set_data_bit_num(uart_hal_context_t *hal, uart_word_length_t data_bit);
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/**
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* @brief Configure the UART parity mode
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*
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* @param hal Context of the HAL layer
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* @param parity_mode The UART parity mode to be set
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*
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* @return None
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*/
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void uart_hal_set_parity(uart_hal_context_t *hal, uart_parity_t parity_mode);
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/**
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* @brief Configure the UART hardware flow control
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*
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* @param hal Context of the HAL layer
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* @param flow_ctrl The flow control mode to be set
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* @param rx_thresh The rts flow control signal will be active if the data length in rxfifo is large than this value
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*
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* @return None
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*/
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void uart_hal_set_hw_flow_ctrl(uart_hal_context_t *hal, uart_hw_flowcontrol_t flow_ctrl, uint8_t rx_thresh);
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/**
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* @brief Configure the UART AT cmd char detect function. When the receiver receives a continuous AT cmd char, it will produce a interrupt
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*
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* @param hal Context of the HAL layer
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* @param at_cmd The AT cmd char detect configuration
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*
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* @return None.
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*/
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void uart_hal_set_at_cmd_char(uart_hal_context_t *hal, uart_at_cmd_t *at_cmd);
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/**
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* @brief Set the timeout value of the UART receiver
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*
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* @param hal Context of the HAL layer
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* @param tout The timeout value for receiver to receive a data
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*
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* @return None
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*/
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void uart_hal_set_rx_timeout(uart_hal_context_t *hal, const uint8_t tout);
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/**
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* @brief Set the UART dtr signal active level
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*
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* @param hal Context of the HAL layer
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* @param active_level The dtr active level. The active level is low if set to 0. The active level is high if set to 1
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*
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* @return None
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*/
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void uart_hal_set_dtr(uart_hal_context_t *hal, int active_level);
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/**
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* @brief Set the UART software flow control
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*
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* @param hal Context of the HAL layer
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* @param flow_ctrl The software flow control configuration
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* @param sw_flow_ctrl_en Set true to enable the software flow control, otherwise set it false
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*
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* @return None
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*/
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void uart_hal_set_sw_flow_ctrl(uart_hal_context_t *hal, uart_sw_flowctrl_t *flow_ctrl, bool sw_flow_ctrl_en);
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/**
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* @brief Set the UART tx idle number
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*
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* @param hal Context of the HAL layer
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* @param idle_num The cycle number betwin the two transmission
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*
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* @return None
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*/
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void uart_hal_set_tx_idle_num(uart_hal_context_t *hal, uint16_t idle_num);
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/**
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* @brief Set the UART rxfifo full threshold
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*
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* @param hal Context of the HAL layer
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* @param full_thrhd The rxfifo full threshold. If the `UART_RXFIFO_FULL` interrupt is enabled and
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* the data length in rxfifo is more than this value, it will generate `UART_RXFIFO_FULL` interrupt
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*
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* @return None
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*/
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void uart_hal_set_rxfifo_full_thr(uart_hal_context_t *hal, uint32_t full_thrhd);
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/**
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* @brief Set the UART txfifo empty threshold
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*
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* @param hal Context of the HAL layer
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* @param empty_thrhd The txfifo empty threshold to be set. If the `UART_TXFIFO_EMPTY` interrupt is enabled and
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* the data length in txfifo is less than this value, it will generate `UART_TXFIFO_EMPTY` interrupt
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*
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* @return None
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*/
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void uart_hal_set_txfifo_empty_thr(uart_hal_context_t *hal, uint32_t empty_thrhd);
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/**
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* @brief Configure the UART to send a number of break(NULL) chars
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*
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* @param hal Context of the HAL layer
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* @param break_num The number of the break char need to be send
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*
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* @return None
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*/
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void uart_hal_tx_break(uart_hal_context_t *hal, uint32_t break_num);
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/**
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* @brief Configure the UART wake up function.
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* Note that RXD cannot be input through GPIO Matrix but only through IO_MUX when use this function
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*
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* @param hal Context of the HAL layer
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* @param wakeup_thrd The wake up threshold to be set. The system will be woken up from light-sleep when the input RXD edge changes more times than `wakeup_thrd+2`
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*
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* @return None
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*/
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void uart_hal_set_wakeup_thrd(uart_hal_context_t *hal, uint32_t wakeup_thrd);
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/**
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* @brief Configure the UART mode
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*
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* @param hal Context of the HAL layer
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* @param mode The UART mode to be set
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*
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* @return None
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*/
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void uart_hal_set_mode(uart_hal_context_t *hal, uart_mode_t mode);
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/**
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* @brief Configure the UART hardware to inverse the signals
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*
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* @param hal Context of the HAL layer
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* @param inv_mask The sigal mask needs to be inversed. Use the ORred mask of type `uart_signal_inv_t`
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*
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* @return None
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*/
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void uart_hal_inverse_signal(uart_hal_context_t *hal, uint32_t inv_mask);
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/**
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* @brief Get the UART wakeup threshold configuration
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*
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* @param hal Context of the HAL layer
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* @param wakeup_thrd Pointer to accept the value of UART wakeup threshold configuration
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*
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* @return None
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*/
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void uart_hal_get_wakeup_thrd(uart_hal_context_t *hal, uint32_t *wakeup_thrd);
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/**
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* @brief Get the UART data bit configuration
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*
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* @param hal Context of the HAL layer
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* @param data_bit Pointer to accept the value of UART data bit configuration
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*
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* @return None
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*/
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void uart_hal_get_data_bit_num(uart_hal_context_t *hal, uart_word_length_t *data_bit);
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/**
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* @brief Get the UART stop bit configuration
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*
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* @param hal Context of the HAL layer
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* @param stop_bit Pointer to accept the value of UART stop bit configuration
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*
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* @return None
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*/
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void uart_hal_get_stop_bits(uart_hal_context_t *hal, uart_stop_bits_t *stop_bit);
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/**
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* @brief Get the UART parity mode configuration
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*
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* @param hal Context of the HAL layer
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* @param parity_mode Pointer to accept the UART parity mode configuration
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*
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* @return None
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*/
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void uart_hal_get_parity(uart_hal_context_t *hal, uart_parity_t *parity_mode);
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/**
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* @brief Get the UART baud-rate configuration
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*
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* @param hal Context of the HAL layer
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* @param baud_rate Pointer to accept the current baud-rate
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*
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* @return None
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*/
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void uart_hal_get_baudrate(uart_hal_context_t *hal, uint32_t *baud_rate);
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/**
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* @brief Get the hw flow control configuration
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*
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* @param hal Context of the HAL layer
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* @param flow_ctrl Pointer to accept the UART flow control configuration
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*
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* @return None
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*/
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void uart_hal_get_hw_flow_ctrl(uart_hal_context_t *hal, uart_hw_flowcontrol_t *flow_ctrl);
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/**
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* @brief Check if the UART rts flow control is enabled
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*
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* @param hal Context of the HAL layer
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*
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* @return True if rts flow control is enabled, otherwise false will be returned
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*/
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bool uart_hal_is_hw_rts_en(uart_hal_context_t *hal);
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/**
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* @brief Get the UART source clock configuration
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*
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* @param hal Context of the HAL layer
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* @param sclk The poiter to accept the UART source clock configuration
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*
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* @return None
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*/
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void uart_hal_get_sclk(uart_hal_context_t *hal, uart_sclk_t *sclk);
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/**
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* @brief Configure TX signal loop back to RX module, just for the testing purposes
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*
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* @param hal Context of the HAL layer
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* @param loop_back_en Set ture to enable the loop back function, else set it false.
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*
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* @return None
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*/
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void uart_hal_set_loop_back(uart_hal_context_t *hal, bool loop_back_en);
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2021-05-09 23:41:02 -04:00
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/**
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* @brief Calculate uart symbol bit length, as defined in configuration.
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*
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* @param hw Beginning address of the peripheral registers.
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*
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* @return number of bits per UART symbol.
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*/
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uint8_t uart_hal_get_symb_len(uart_hal_context_t *hal);
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/**
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|
* @brief Get UART maximum timeout threshold.
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*
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* @param hw Beginning address of the peripheral registers.
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*
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* @return maximum timeout threshold value for target.
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|
*/
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uint16_t uart_hal_get_max_rx_timeout_thrd(uart_hal_context_t *hal);
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|
/**
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|
* @brief Get the timeout threshold value set for receiver.
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|
*
|
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|
|
* @param hw Beginning address of the peripheral registers.
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|
|
*
|
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|
|
* @return tout_thr The timeout value. If timeout is disabled then returns 0.
|
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|
|
*/
|
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|
#define uart_hal_get_rx_tout_thr(hal) uart_ll_get_rx_tout_thr((hal)->dev)
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|
/**
|
|
|
|
* @brief Get the length of readable data in UART rxfifo.
|
|
|
|
*
|
|
|
|
* @param hw Beginning address of the peripheral registers.
|
|
|
|
*
|
|
|
|
* @return The readable data length in rxfifo.
|
|
|
|
*/
|
|
|
|
#define uart_hal_get_rxfifo_len(hal) uart_ll_get_rxfifo_len((hal)->dev)
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|
|
|
2019-04-17 08:19:44 -04:00
|
|
|
#ifdef __cplusplus
|
|
|
|
}
|
2021-05-09 23:41:02 -04:00
|
|
|
#endif
|