2022-07-08 05:33:19 -04:00
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/*
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2023-02-15 12:49:24 -05:00
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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2022-07-08 05:33:19 -04:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <esp_bit_defs.h>
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#include "esp_efuse.h"
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#include "esp_efuse_table.h"
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2023-04-27 04:53:48 -04:00
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#include "esp_efuse_rtc_calib.h"
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2023-05-05 07:56:44 -04:00
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#include "hal/efuse_hal.h"
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/**
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* @brief Get the signed value by the raw data that read from eFuse
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* @param data The raw data that read from eFuse
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* @param sign_bit The index of the sign bit, start from 0
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*/
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#define RTC_CALIB_GET_SIGNED_VAL(data, sign_bit) ((data & BIT##sign_bit) ? -(int)(data & ~BIT##sign_bit) : (int)data)
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2022-07-08 05:33:19 -04:00
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int esp_efuse_rtc_calib_get_ver(void)
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{
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2023-05-05 07:56:44 -04:00
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uint32_t cali_version = 0;
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2023-06-21 01:31:16 -04:00
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uint32_t blk_ver = efuse_hal_blk_version();
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if (blk_ver == 1) {
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cali_version = ESP_EFUSE_ADC_CALIB_VER1;
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} else if (blk_ver >= 2) {
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cali_version = ESP_EFUSE_ADC_CALIB_VER2;
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2023-05-05 07:56:44 -04:00
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} else {
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2023-04-27 04:53:48 -04:00
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ESP_LOGW("eFuse", "calibration efuse version does not match, set default version to 0");
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}
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2023-05-05 07:56:44 -04:00
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return cali_version;
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2022-07-08 05:33:19 -04:00
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}
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uint32_t esp_efuse_rtc_calib_get_init_code(int version, uint32_t adc_unit, int atten)
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{
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2023-06-21 01:31:16 -04:00
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/* Version validation should be guaranteed in the caller */
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2023-05-05 07:56:44 -04:00
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assert(atten >=0 && atten < 4);
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2022-07-08 05:33:19 -04:00
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(void) adc_unit;
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2023-04-27 04:53:48 -04:00
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const esp_efuse_desc_t** init_code_efuse;
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if (atten == 0) {
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init_code_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN0;
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} else if (atten == 1) {
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init_code_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN1;
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} else if (atten == 2) {
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init_code_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN2;
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} else {
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init_code_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN3;
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}
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int init_code_size = esp_efuse_get_field_size(init_code_efuse);
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assert(init_code_size == 10);
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uint32_t init_code = 0;
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ESP_ERROR_CHECK(esp_efuse_read_field_blob(init_code_efuse, &init_code, init_code_size));
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2023-05-05 07:56:44 -04:00
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return init_code + 1600; // version 1 logic
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}
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int esp_efuse_rtc_calib_get_chan_compens(int version, uint32_t adc_unit, uint32_t adc_channel, int atten)
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{
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2023-06-21 01:31:16 -04:00
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/* Version validation should be guaranteed in the caller */
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2023-05-05 07:56:44 -04:00
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assert(atten < 4);
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assert(adc_channel < SOC_ADC_CHANNEL_NUM(adc_unit));
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const esp_efuse_desc_t** chan_diff_efuse = NULL;
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switch (adc_channel) {
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case 0:
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chan_diff_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH0;
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break;
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case 1:
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chan_diff_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH1;
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break;
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case 2:
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chan_diff_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH2;
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break;
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case 3:
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chan_diff_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH3;
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break;
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case 4:
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chan_diff_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH4;
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break;
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case 5:
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chan_diff_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH5;
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break;
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default:
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chan_diff_efuse = ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH6;
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break;
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}
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int chan_diff_size = esp_efuse_get_field_size(chan_diff_efuse);
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assert(chan_diff_size == 4);
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uint32_t chan_diff = 0;
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ESP_ERROR_CHECK(esp_efuse_read_field_blob(chan_diff_efuse, &chan_diff, chan_diff_size));
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return RTC_CALIB_GET_SIGNED_VAL(chan_diff, 3) * (4 - atten);
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2022-07-08 05:33:19 -04:00
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}
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2023-04-27 04:53:48 -04:00
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esp_err_t esp_efuse_rtc_calib_get_cal_voltage(int version, uint32_t adc_unit, int atten, uint32_t* out_digi, uint32_t* out_vol_mv)
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2022-07-08 05:33:19 -04:00
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{
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(void) adc_unit;
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2023-06-21 01:31:16 -04:00
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const esp_efuse_desc_t** cal_vol_efuse[4] = {
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ESP_EFUSE_ADC1_CAL_VOL_ATTEN0,
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ESP_EFUSE_ADC1_CAL_VOL_ATTEN1,
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ESP_EFUSE_ADC1_CAL_VOL_ATTEN2,
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ESP_EFUSE_ADC1_CAL_VOL_ATTEN3,
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};
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const uint32_t input_vout_mv[2][4] = {
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{400, 550, 750, 1370}, // Calibration V1 coefficients
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{750, 1000, 1500, 2800}, // Calibration V2 coefficients
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};
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if ((version < ESP_EFUSE_ADC_CALIB_VER_MIN) ||
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(version > ESP_EFUSE_ADC_CALIB_VER_MAX)) {
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return ESP_ERR_INVALID_ARG;
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}
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if (atten >= 4 || atten < 0) {
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return ESP_ERR_INVALID_ARG;
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}
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2023-06-21 01:31:16 -04:00
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assert(cal_vol_efuse[atten][0]->bit_count == 10);
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2023-04-27 04:53:48 -04:00
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2023-06-21 01:31:16 -04:00
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uint32_t cal_vol = 0;
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esp_err_t ret = esp_efuse_read_field_blob(cal_vol_efuse[atten], &cal_vol, cal_vol_efuse[atten][0]->bit_count);
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if (ret != ESP_OK) {
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return ret;
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}
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uint32_t chk_offset = (version == ESP_EFUSE_ADC_CALIB_VER1) ? 1500 : (atten == 2) ? 2900 : 2850;
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*out_digi = chk_offset + RTC_CALIB_GET_SIGNED_VAL(cal_vol, 9);
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*out_vol_mv = input_vout_mv[VER2IDX(version)][atten];
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2022-07-08 05:33:19 -04:00
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return ESP_OK;
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}
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esp_err_t esp_efuse_rtc_calib_get_tsens_val(float* tsens_cal)
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{
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2022-10-20 03:04:33 -04:00
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// Currently calibration is not supported on ESP32-C6, IDF-5236
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*tsens_cal = 0;
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2022-07-08 05:33:19 -04:00
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return ESP_OK;
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}
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