esp-idf/components/esp_common/Kconfig

menu "Common ESP-related"

    config ESP_ERR_TO_NAME_LOOKUP
        bool "Enable lookup of error code strings"
        default "y"
        help
            Functions esp_err_to_name() and esp_err_to_name_r() return string representations of error codes from a
            pre-generated lookup table. This option can be used to turn off the use of the look-up table in order to
            save memory but this comes at the price of sacrificing distinguishable (meaningful) output string
            representations.

    config ESP_SYSTEM_EVENT_QUEUE_SIZE
        int "System event queue size"
        default 32
        help
            Config system event queue size in different application.

    config ESP_SYSTEM_EVENT_TASK_STACK_SIZE
        int "Event loop task stack size"
        default 2304
        help
            Config system event task stack size in different application.

    config ESP_MAIN_TASK_STACK_SIZE
        int "Main task stack size"
        default 3584
        help
            Configure the "main task" stack size. This is the stack of the task
            which calls app_main(). If app_main() returns then this task is deleted
            and its stack memory is freed.

    config ESP_IPC_TASK_STACK_SIZE
        int "Inter-Processor Call (IPC) task stack size"
        range 512 65536 if !APPTRACE_ENABLE
        range 2048 65536 if APPTRACE_ENABLE
        default 2048 if APPTRACE_ENABLE
        default 1024
        help
            Configure the IPC tasks stack size. One IPC task runs on each core
            (in dual core mode), and allows for cross-core function calls.

            See IPC documentation for more details.

            The default stack size should be enough for most common use cases.
            It can be shrunk if you are sure that you do not use any custom
            IPC functionality.

    config ESP_IPC_USES_CALLERS_PRIORITY
        bool "IPC runs at caller's priority"
        default y
        depends on !FREERTOS_UNICORE
        help
            If this option is not enabled then the IPC task will keep behavior
            same as prior to that of ESP-IDF v4.0, and hence IPC task will run
            at (configMAX_PRIORITIES - 1) priority.

    config ESP_MINIMAL_SHARED_STACK_SIZE
        int "Minimal allowed size for shared stack"
        default 2048
        help
            Minimal value of size, in bytes, accepted to execute a expression
            with shared stack.

    choice ESP_CONSOLE_UART
        prompt "Channel for console output"
        default ESP_CONSOLE_UART_DEFAULT
        help
            Select where to send console output (through stdout and stderr).

            - Default is to use UART0 on pre-defined GPIOs.
            - If "Custom" is selected, UART0 or UART1 can be chosen,
              and any pins can be selected.
            - If "None" is selected, there will be no console output on any UART, except
              for initial output from ROM bootloader. This ROM output can be suppressed by
              GPIO strapping or EFUSE, refer to chip datasheet for details.
            - On chips with USB OTG peripheral, "USB CDC" option redirects output to the
              CDC port. This option uses the CDC driver in the chip ROM.
              This option is incompatible with TinyUSB stack.
            - On chips with an USB serial/JTAG debug controller, selecting the option
              for that redirects output to the CDC/ACM (serial port emulation) component
              of that device.
        config ESP_CONSOLE_UART_DEFAULT
            bool "Default: UART0"
        config ESP_CONSOLE_USB_CDC
            bool "USB CDC"
            # The naming is confusing: USB_ENABLED means that TinyUSB driver is enabled, not USB in general.
            # && !USB_ENABLED is because the ROM CDC driver is currently incompatible with TinyUSB.
            depends on IDF_TARGET_ESP32S2 && !USB_ENABLED
        config ESP_CONSOLE_USB_SERIAL_JTAG
            bool "USB Serial/JTAG Controller"
            depends on IDF_TARGET_ESP32C3
        config ESP_CONSOLE_UART_CUSTOM
            bool "Custom UART"
        config ESP_CONSOLE_NONE
            bool "None"
    endchoice

    choice ESP_CONSOLE_SECONDARY
        depends on IDF_TARGET_ESP32C3
        prompt "Channel for console secondary output"
        default ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG
        help
            This secondary option supports output through other specific port like USB_SERIAL_JTAG
            when UART0 port as a primary is selected but not connected. This secondary output currently only supports
            non-blocking mode without using REPL. If you want to output in blocking mode with REPL or
            input through this secondary port, please change the primary config to this port
            in `Channel for console output` menu.
        config ESP_CONSOLE_SECONDARY_NONE
            bool "No secondary console"
        config ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG
            bool "USB_SERIAL_JTAG PORT"
            depends on !ESP_CONSOLE_USB_SERIAL_JTAG
            help
                This option supports output through USB_SERIAL_JTAG port when the UART0 port is not connected.
                The output currently only supports non-blocking mode without using the console.
                If you want to output in blocking mode with REPL or input through USB_SERIAL_JTAG port,
                please change the primary config to ESP_CONSOLE_USB_SERIAL_JTAG above.
    endchoice

    config ESP_CONSOLE_UART
        # Internal option, indicates that console UART is used (and not USB, for example)
        bool
        default y if ESP_CONSOLE_UART_DEFAULT || ESP_CONSOLE_UART_CUSTOM

    config ESP_CONSOLE_MULTIPLE_UART
        bool
        default y if !IDF_TARGET_ESP32C3

    choice ESP_CONSOLE_UART_NUM
        prompt "UART peripheral to use for console output (0-1)"
        depends on ESP_CONSOLE_UART_CUSTOM && ESP_CONSOLE_MULTIPLE_UART
        default ESP_CONSOLE_UART_CUSTOM_NUM_0
        help
            This UART peripheral is used for console output from the ESP-IDF Bootloader and the app.

            If the configuration is different in the Bootloader binary compared to the app binary, UART
            is reconfigured after the bootloader exits and the app starts.

            Due to an ESP32 ROM bug, UART2 is not supported for console output
            via esp_rom_printf.

        config ESP_CONSOLE_UART_CUSTOM_NUM_0
            bool "UART0"
        config ESP_CONSOLE_UART_CUSTOM_NUM_1
            bool "UART1"
    endchoice

    config ESP_CONSOLE_UART_NUM
        int
        default 0 if ESP_CONSOLE_UART_DEFAULT
        default 0 if !ESP_CONSOLE_MULTIPLE_UART
        default 0 if ESP_CONSOLE_UART_CUSTOM_NUM_0
        default 1 if ESP_CONSOLE_UART_CUSTOM_NUM_1
        default -1 if !ESP_CONSOLE_UART

    config ESP_CONSOLE_UART_TX_GPIO
        int "UART TX on GPIO#"
        depends on ESP_CONSOLE_UART_CUSTOM
        range 0 46
        default 1 if IDF_TARGET_ESP32
        default 21 if IDF_TARGET_ESP32C3
        default 43
        help
             This GPIO is used for console UART TX output in the ESP-IDF Bootloader and the app (including
             boot log output and default standard output and standard error of the app).

             If the configuration is different in the Bootloader binary compared to the app binary, UART
             is reconfigured after the bootloader exits and the app starts.

    config ESP_CONSOLE_UART_RX_GPIO
        int "UART RX on GPIO#"
        depends on ESP_CONSOLE_UART_CUSTOM
        range 0 46
        default 3 if IDF_TARGET_ESP32
        default 20 if IDF_TARGET_ESP32C3
        default 44
        help
            This GPIO is used for UART RX input in the ESP-IDF Bootloader and the app (including
            default default standard input of the app).

            Note: The default ESP-IDF Bootloader configures this pin but doesn't read anything from the UART.

            If the configuration is different in the Bootloader binary compared to the app binary, UART
            is reconfigured after the bootloader exits and the app starts.


    config ESP_CONSOLE_UART_BAUDRATE
        int
        prompt "UART console baud rate" if ESP_CONSOLE_UART_CUSTOM
        depends on ESP_CONSOLE_UART
        default 115200
        range 1200 4000000 if !PM_ENABLE
        range 1200 1000000 if PM_ENABLE
        help
            This baud rate is used by both the ESP-IDF Bootloader and the app (including
            boot log output and default standard input/output/error of the app).

            The app's maximum baud rate depends on the UART clock source. If Power Management is disabled,
            the UART clock source is the APB clock and all baud rates in the available range will be sufficiently
            accurate. If Power Management is enabled, REF_TICK clock source is used so the baud rate is divided
            from 1MHz. Baud rates above 1Mbps are not possible and values between 500Kbps and 1Mbps may not be
            accurate.

            If the configuration is different in the Bootloader binary compared to the app binary, UART
            is reconfigured after the bootloader exits and the app starts.

    config ESP_CONSOLE_USB_CDC_RX_BUF_SIZE
        int "Size of USB CDC RX buffer"
        depends on ESP_CONSOLE_USB_CDC
        default 64
        range 4 16384
        help
            Set the size of USB CDC RX buffer. Increase the buffer size if your application
            is often receiving data over USB CDC.

    config ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF
        bool "Enable esp_rom_printf / ESP_EARLY_LOG via USB CDC"
        depends on ESP_CONSOLE_USB_CDC
        default n
        help
            If enabled, esp_rom_printf and ESP_EARLY_LOG output will also be sent over USB CDC.
            Disabling this option saves about 1kB or RAM.

    config ESP_INT_WDT
        bool "Interrupt watchdog"
        default y
        help
            This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
            either because a task turned off interrupts and did not turn them on for a long time, or because an
            interrupt handler did not return. It will try to invoke the panic handler first and failing that
            reset the SoC.

    config ESP_INT_WDT_TIMEOUT_MS
        int "Interrupt watchdog timeout (ms)"
        depends on ESP_INT_WDT
        default 300 if !ESP32_SPIRAM_SUPPORT
        default 800 if ESP32_SPIRAM_SUPPORT
        range 10 10000
        help
            The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.

    config ESP_INT_WDT_CHECK_CPU1
        bool "Also watch CPU1 tick interrupt"
        depends on ESP_INT_WDT && !FREERTOS_UNICORE
        default y
        help
            Also detect if interrupts on CPU 1 are disabled for too long.

    config ESP_TASK_WDT
        bool "Initialize Task Watchdog Timer on startup"
        default y
        help
            The Task Watchdog Timer can be used to make sure individual tasks are still
            running. Enabling this option will cause the Task Watchdog Timer to be
            initialized automatically at startup. The Task Watchdog timer can be
            initialized after startup as well (see Task Watchdog Timer API Reference)

    config ESP_TASK_WDT_PANIC
        bool "Invoke panic handler on Task Watchdog timeout"
        depends on ESP_TASK_WDT
        default n
        help
            If this option is enabled, the Task Watchdog Timer will be configured to
            trigger the panic handler when it times out. This can also be configured
            at run time (see Task Watchdog Timer API Reference)

    config ESP_TASK_WDT_TIMEOUT_S
        int "Task Watchdog timeout period (seconds)"
        depends on ESP_TASK_WDT
        range 1 60
        default 5
        help
            Timeout period configuration for the Task Watchdog Timer in seconds.
            This is also configurable at run time (see Task Watchdog Timer API Reference)

    config ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
        bool "Watch CPU0 Idle Task"
        depends on ESP_TASK_WDT
        default y
        help
            If this option is enabled, the Task Watchdog Timer will watch the CPU0
            Idle Task. Having the Task Watchdog watch the Idle Task allows for detection
            of CPU starvation as the Idle Task not being called is usually a symptom of
            CPU starvation. Starvation of the Idle Task is detrimental as FreeRTOS household
            tasks depend on the Idle Task getting some runtime every now and then.

    config ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1
        bool "Watch CPU1 Idle Task"
        depends on ESP_TASK_WDT && !FREERTOS_UNICORE
        default y
        help
            If this option is enabled, the Task Wtachdog Timer will wach the CPU1
            Idle Task.

    config ESP_PANIC_HANDLER_IRAM
        bool "Place panic handler code in IRAM"
        default n
        help
            If this option is disabled (default), the panic handler code is placed in flash not IRAM.
            This means that if ESP-IDF crashes while flash cache is disabled, the panic handler will
            automatically re-enable flash cache before running GDB Stub or Core Dump. This adds some minor
            risk, if the flash cache status is also corrupted during the crash.

            If this option is enabled, the panic handler code is placed in IRAM. This allows the panic
            handler to run without needing to re-enable cache first. This may be necessary to debug some
            complex issues with crashes while flash cache is disabled (for example, when writing to
            SPI flash.)

    config ESP_DEBUG_STUBS_ENABLE
        bool
        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
        depends on !ESP32_TRAX && !ESP32S2_TRAX
        help
            Debug stubs are used by OpenOCD to execute pre-compiled onboard code
            which does some useful debugging stuff, e.g. GCOV data dump.

    config ESP_MAC_ADDR_UNIVERSE_WIFI_STA
        bool

    config ESP_MAC_ADDR_UNIVERSE_WIFI_AP
        bool

    config ESP_MAC_ADDR_UNIVERSE_BT
        bool

    config ESP_MAC_ADDR_UNIVERSE_ETH
        bool

    config ESP_ALLOW_BSS_SEG_EXTERNAL_MEMORY
        # Invisible option that is set by SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY, but
        # exists even if SPIRAM is not supported
        bool

endmenu # Common ESP-related