2022-10-31 03:22:23 -04:00
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/*
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2023-03-22 00:07:27 -04:00
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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2022-10-31 03:22:23 -04:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// The HAL layer for MODEM CLOCK (ESP32-C6 specific part)
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#include <stdbool.h>
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#include "soc/soc.h"
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#include "esp_attr.h"
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#include "hal/modem_clock_hal.h"
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#include "hal/modem_clock_types.h"
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2023-06-16 05:36:18 -04:00
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#include "hal/efuse_hal.h"
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2022-10-31 03:22:23 -04:00
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#include "hal/assert.h"
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typedef enum {
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MODEM_CLOCK_XTAL32K_CODE = 0,
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MODEM_CLOCK_RC32K_CODE = 1,
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MODEM_CLOCK_EXT32K_CODE = 2
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} modem_clock_32k_clk_src_code_t;
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void modem_clock_hal_set_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain, uint32_t bitmap)
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{
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HAL_ASSERT(domain < MODEM_CLOCK_DOMAIN_MAX);
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switch (domain)
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{
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case MODEM_CLOCK_DOMAIN_MODEM_APB:
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modem_syscon_ll_set_modem_apb_icg_bitmap(hal->syscon_dev, bitmap);
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break;
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case MODEM_CLOCK_DOMAIN_MODEM_PERIPH:
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modem_syscon_ll_set_modem_periph_icg_bitmap(hal->syscon_dev, bitmap);
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break;
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case MODEM_CLOCK_DOMAIN_WIFI:
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modem_syscon_ll_set_wifi_icg_bitmap(hal->syscon_dev, bitmap);
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break;
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case MODEM_CLOCK_DOMAIN_BT:
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modem_syscon_ll_set_bt_icg_bitmap(hal->syscon_dev, bitmap);
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break;
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case MODEM_CLOCK_DOMAIN_FE:
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modem_syscon_ll_set_fe_icg_bitmap(hal->syscon_dev, bitmap);
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break;
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case MODEM_CLOCK_DOMAIN_IEEE802154:
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modem_syscon_ll_set_ieee802154_icg_bitmap(hal->syscon_dev, bitmap);
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break;
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case MODEM_CLOCK_DOMAIN_LP_APB:
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modem_lpcon_ll_set_lp_apb_icg_bitmap(hal->lpcon_dev, bitmap);
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break;
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case MODEM_CLOCK_DOMAIN_I2C_MASTER:
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modem_lpcon_ll_set_i2c_master_icg_bitmap(hal->lpcon_dev, bitmap);
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break;
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case MODEM_CLOCK_DOMAIN_COEX:
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modem_lpcon_ll_set_coex_icg_bitmap(hal->lpcon_dev, bitmap);
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break;
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case MODEM_CLOCK_DOMAIN_WIFIPWR:
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modem_lpcon_ll_set_wifipwr_icg_bitmap(hal->lpcon_dev, bitmap);
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break;
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default:
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break;
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}
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}
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2023-06-14 02:56:44 -04:00
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uint32_t modem_clock_hal_get_clock_domain_icg_bitmap(modem_clock_hal_context_t *hal, modem_clock_domain_t domain)
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{
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HAL_ASSERT(domain < MODEM_CLOCK_DOMAIN_MAX);
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uint32_t bitmap = 0;
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switch (domain)
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{
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case MODEM_CLOCK_DOMAIN_MODEM_APB:
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bitmap = modem_syscon_ll_get_modem_apb_icg_bitmap(hal->syscon_dev);
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break;
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case MODEM_CLOCK_DOMAIN_MODEM_PERIPH:
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bitmap = modem_syscon_ll_get_modem_periph_icg_bitmap(hal->syscon_dev);
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break;
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case MODEM_CLOCK_DOMAIN_WIFI:
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bitmap = modem_syscon_ll_get_wifi_icg_bitmap(hal->syscon_dev);
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break;
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case MODEM_CLOCK_DOMAIN_BT:
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bitmap = modem_syscon_ll_get_bt_icg_bitmap(hal->syscon_dev);
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break;
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case MODEM_CLOCK_DOMAIN_FE:
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bitmap = modem_syscon_ll_get_fe_icg_bitmap(hal->syscon_dev);
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break;
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case MODEM_CLOCK_DOMAIN_IEEE802154:
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bitmap = modem_syscon_ll_get_ieee802154_icg_bitmap(hal->syscon_dev);
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break;
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case MODEM_CLOCK_DOMAIN_LP_APB:
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bitmap = modem_lpcon_ll_get_lp_apb_icg_bitmap(hal->lpcon_dev);
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break;
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case MODEM_CLOCK_DOMAIN_I2C_MASTER:
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bitmap = modem_lpcon_ll_get_i2c_master_icg_bitmap(hal->lpcon_dev);
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break;
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case MODEM_CLOCK_DOMAIN_COEX:
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bitmap = modem_lpcon_ll_get_coex_icg_bitmap(hal->lpcon_dev);
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break;
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case MODEM_CLOCK_DOMAIN_WIFIPWR:
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bitmap = modem_lpcon_ll_get_wifipwr_icg_bitmap(hal->lpcon_dev);
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break;
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default:
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break;
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}
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return bitmap;
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}
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2023-03-22 00:07:27 -04:00
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void modem_clock_hal_enable_fe_clock(modem_clock_hal_context_t *hal, bool enable)
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{
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if (enable) {
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modem_syscon_ll_enable_fe_apb_clock(hal->syscon_dev, enable);
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modem_syscon_ll_enable_fe_cal_160m_clock(hal->syscon_dev, enable);
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modem_syscon_ll_enable_fe_160m_clock(hal->syscon_dev, enable);
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modem_syscon_ll_enable_fe_80m_clock(hal->syscon_dev, enable);
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}
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}
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2023-03-22 09:50:04 -04:00
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void modem_clock_hal_set_ble_rtc_timer_divisor_value(modem_clock_hal_context_t *hal, uint32_t divider)
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2022-10-31 03:22:23 -04:00
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{
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2023-03-22 09:50:04 -04:00
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modem_lpcon_ll_set_ble_rtc_timer_divisor_value(hal->lpcon_dev, divider);
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2022-10-31 03:22:23 -04:00
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}
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2023-03-22 09:50:04 -04:00
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void modem_clock_hal_enable_ble_rtc_timer_clock(modem_clock_hal_context_t *hal, bool enable)
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{
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modem_lpcon_ll_enable_ble_rtc_timer_clock(hal->lpcon_dev, enable);
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}
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void modem_clock_hal_deselect_all_ble_rtc_timer_lpclk_source(modem_clock_hal_context_t *hal)
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{
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modem_lpcon_ll_enable_ble_rtc_timer_slow_osc(hal->lpcon_dev, false);
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modem_lpcon_ll_enable_ble_rtc_timer_fast_osc(hal->lpcon_dev, false);
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modem_lpcon_ll_enable_ble_rtc_timer_32k_xtal(hal->lpcon_dev, false);
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modem_lpcon_ll_enable_ble_rtc_timer_main_xtal(hal->lpcon_dev, false);
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}
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void modem_clock_hal_select_ble_rtc_timer_lpclk_source(modem_clock_hal_context_t *hal, modem_clock_lpclk_src_t src)
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2022-10-31 03:22:23 -04:00
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{
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HAL_ASSERT(src < MODEM_CLOCK_LPCLK_SRC_MAX);
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switch (src)
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{
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case MODEM_CLOCK_LPCLK_SRC_RC_SLOW:
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2023-03-22 09:50:04 -04:00
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modem_lpcon_ll_enable_ble_rtc_timer_slow_osc(hal->lpcon_dev, true);
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2022-10-31 03:22:23 -04:00
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break;
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case MODEM_CLOCK_LPCLK_SRC_RC_FAST:
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2023-03-22 09:50:04 -04:00
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modem_lpcon_ll_enable_ble_rtc_timer_fast_osc(hal->lpcon_dev, true);
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2022-10-31 03:22:23 -04:00
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break;
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case MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL:
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2023-03-22 09:50:04 -04:00
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modem_lpcon_ll_enable_ble_rtc_timer_main_xtal(hal->lpcon_dev, true);
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2022-10-31 03:22:23 -04:00
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break;
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case MODEM_CLOCK_LPCLK_SRC_RC32K:
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2023-03-22 09:50:04 -04:00
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modem_lpcon_ll_enable_ble_rtc_timer_32k_xtal(hal->lpcon_dev, true);
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2022-10-31 03:22:23 -04:00
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modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_RC32K_CODE);
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break;
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case MODEM_CLOCK_LPCLK_SRC_XTAL32K:
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2023-03-22 09:50:04 -04:00
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modem_lpcon_ll_enable_ble_rtc_timer_32k_xtal(hal->lpcon_dev, true);
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2022-10-31 03:22:23 -04:00
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modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_XTAL32K_CODE);
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break;
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case MODEM_CLOCK_LPCLK_SRC_EXT32K:
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2023-03-22 09:50:04 -04:00
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modem_lpcon_ll_enable_ble_rtc_timer_32k_xtal(hal->lpcon_dev, true);
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2022-10-31 03:22:23 -04:00
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modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_EXT32K_CODE);
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break;
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default:
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break;
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}
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}
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void modem_clock_hal_deselect_all_coex_lpclk_source(modem_clock_hal_context_t *hal)
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{
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modem_lpcon_ll_enable_coex_lpclk_slow_osc(hal->lpcon_dev, false);
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modem_lpcon_ll_enable_coex_lpclk_fast_osc(hal->lpcon_dev, false);
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modem_lpcon_ll_enable_coex_lpclk_32k_xtal(hal->lpcon_dev, false);
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modem_lpcon_ll_enable_coex_lpclk_main_xtal(hal->lpcon_dev, false);
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}
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void modem_clock_hal_select_coex_lpclk_source(modem_clock_hal_context_t *hal, modem_clock_lpclk_src_t src)
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{
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HAL_ASSERT(src < MODEM_CLOCK_LPCLK_SRC_MAX);
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switch (src)
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{
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case MODEM_CLOCK_LPCLK_SRC_RC_SLOW:
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modem_lpcon_ll_enable_coex_lpclk_slow_osc(hal->lpcon_dev, true);
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break;
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case MODEM_CLOCK_LPCLK_SRC_RC_FAST:
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modem_lpcon_ll_enable_coex_lpclk_fast_osc(hal->lpcon_dev, true);
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break;
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case MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL:
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modem_lpcon_ll_enable_coex_lpclk_main_xtal(hal->lpcon_dev, true);
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break;
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case MODEM_CLOCK_LPCLK_SRC_RC32K:
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modem_lpcon_ll_enable_coex_lpclk_32k_xtal(hal->lpcon_dev, true);
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modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_RC32K_CODE);
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break;
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case MODEM_CLOCK_LPCLK_SRC_XTAL32K:
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modem_lpcon_ll_enable_coex_lpclk_32k_xtal(hal->lpcon_dev, true);
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modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_XTAL32K_CODE);
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break;
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case MODEM_CLOCK_LPCLK_SRC_EXT32K:
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modem_lpcon_ll_enable_coex_lpclk_32k_xtal(hal->lpcon_dev, true);
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modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_EXT32K_CODE);
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break;
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default:
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break;
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}
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}
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void modem_clock_hal_deselect_all_wifi_lpclk_source(modem_clock_hal_context_t *hal)
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{
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modem_lpcon_ll_enable_wifi_lpclk_slow_osc(hal->lpcon_dev, false);
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modem_lpcon_ll_enable_wifi_lpclk_fast_osc(hal->lpcon_dev, false);
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modem_lpcon_ll_enable_wifi_lpclk_32k_xtal(hal->lpcon_dev, false);
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modem_lpcon_ll_enable_wifi_lpclk_main_xtal(hal->lpcon_dev, false);
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}
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void modem_clock_hal_select_wifi_lpclk_source(modem_clock_hal_context_t *hal, modem_clock_lpclk_src_t src)
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{
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HAL_ASSERT(src < MODEM_CLOCK_LPCLK_SRC_MAX);
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switch (src)
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{
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case MODEM_CLOCK_LPCLK_SRC_RC_SLOW:
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modem_lpcon_ll_enable_wifi_lpclk_slow_osc(hal->lpcon_dev, true);
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break;
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case MODEM_CLOCK_LPCLK_SRC_RC_FAST:
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modem_lpcon_ll_enable_wifi_lpclk_fast_osc(hal->lpcon_dev, true);
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break;
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case MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL:
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modem_lpcon_ll_enable_wifi_lpclk_main_xtal(hal->lpcon_dev, true);
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break;
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case MODEM_CLOCK_LPCLK_SRC_RC32K:
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modem_lpcon_ll_enable_wifi_lpclk_32k_xtal(hal->lpcon_dev, true);
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modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_RC32K_CODE);
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break;
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case MODEM_CLOCK_LPCLK_SRC_XTAL32K:
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modem_lpcon_ll_enable_wifi_lpclk_32k_xtal(hal->lpcon_dev, true);
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modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_XTAL32K_CODE);
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break;
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case MODEM_CLOCK_LPCLK_SRC_EXT32K:
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modem_lpcon_ll_enable_wifi_lpclk_32k_xtal(hal->lpcon_dev, true);
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modem_lpcon_ll_select_modem_32k_clock_source(hal->lpcon_dev, MODEM_CLOCK_EXT32K_CODE);
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break;
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default:
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break;
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}
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}
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2023-06-16 05:36:18 -04:00
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void modem_clock_hal_enable_wifipwr_clock(modem_clock_hal_context_t *hal, bool enable)
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{
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if (efuse_hal_chip_revision() == 0) { /* eco0 */
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modem_lpcon_ll_enable_wifipwr_clock(hal->lpcon_dev, enable);
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} else {
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static int ref = 0;
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if (enable) {
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if (ref++ == 0) {
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modem_lpcon_ll_enable_wifipwr_clock(hal->lpcon_dev, enable);
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}
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} else {
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if (--ref == 0) {
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modem_lpcon_ll_enable_wifipwr_clock(hal->lpcon_dev, enable);
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}
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}
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HAL_ASSERT(ref > 0);
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}
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}
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