2021-10-29 00:39:53 -04:00
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/*
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* Multi-precision integer library
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* ESP32 hardware accelerated parts based on mbedTLS implementation
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2020-03-09 01:58:05 -04:00
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*
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2021-10-29 00:39:53 -04:00
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* SPDX-FileCopyrightText: The Mbed TLS Contributors
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2020-03-09 01:58:05 -04:00
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*
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2021-10-29 00:39:53 -04:00
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* SPDX-License-Identifier: Apache-2.0
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2020-03-09 01:58:05 -04:00
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*
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2021-10-29 00:39:53 -04:00
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* SPDX-FileContributor: 2016-2021 Espressif Systems (Shanghai) CO LTD
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2020-03-09 01:58:05 -04:00
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*/
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2020-03-03 02:01:19 -05:00
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#include "soc/hwcrypto_periph.h"
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2020-11-26 03:56:13 -05:00
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#include "soc/dport_reg.h"
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2021-10-25 05:13:46 -04:00
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#include "esp_private/periph_ctrl.h"
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2020-03-03 02:01:19 -05:00
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#include <mbedtls/bignum.h>
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2020-03-09 01:58:05 -04:00
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#include "bignum_impl.h"
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#include <sys/param.h>
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2020-04-07 00:30:00 -04:00
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#include <sys/lock.h>
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static _lock_t mpi_lock;
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2020-03-03 02:01:19 -05:00
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/* Round up number of words to nearest
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512 bit (16 word) block count.
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*/
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2020-03-09 01:58:05 -04:00
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size_t esp_mpi_hardware_words(size_t words)
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2020-03-03 02:01:19 -05:00
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{
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return (words + 0xF) & ~0xF;
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}
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2020-03-09 01:58:05 -04:00
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void esp_mpi_enable_hardware_hw_op( void )
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2020-03-03 02:01:19 -05:00
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{
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2020-04-07 00:30:00 -04:00
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/* newlib locks lazy initialize on ESP-IDF */
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_lock_acquire(&mpi_lock);
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2020-03-03 02:01:19 -05:00
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/* Enable RSA hardware */
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periph_module_enable(PERIPH_RSA_MODULE);
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DPORT_REG_CLR_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD);
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2020-03-09 01:58:05 -04:00
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while (DPORT_REG_READ(RSA_CLEAN_REG) != 1)
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{ }
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2020-03-03 02:01:19 -05:00
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// Note: from enabling RSA clock to here takes about 1.3us
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}
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2020-03-09 01:58:05 -04:00
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void esp_mpi_disable_hardware_hw_op( void )
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2020-03-03 02:01:19 -05:00
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{
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DPORT_REG_SET_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD);
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/* Disable RSA hardware */
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periph_module_disable(PERIPH_RSA_MODULE);
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2020-04-07 00:30:00 -04:00
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_lock_release(&mpi_lock);
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2020-03-03 02:01:19 -05:00
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}
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2021-12-27 23:04:05 -05:00
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void esp_mpi_interrupt_enable( bool enable )
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{
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DPORT_REG_WRITE(RSA_INTERRUPT_REG, enable);
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}
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void esp_mpi_interrupt_clear( void )
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{
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DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
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}
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2020-03-03 02:01:19 -05:00
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/* Copy mbedTLS MPI bignum 'mpi' to hardware memory block at 'mem_base'.
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If hw_words is higher than the number of words in the bignum then
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these additional words will be zeroed in the memory buffer.
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*/
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static inline void mpi_to_mem_block(uint32_t mem_base, const mbedtls_mpi *mpi, size_t hw_words)
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{
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uint32_t *pbase = (uint32_t *)mem_base;
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uint32_t copy_words = MIN(hw_words, mpi->MBEDTLS_PRIVATE(n));
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2020-03-03 02:01:19 -05:00
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/* Copy MPI data to memory block registers */
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2020-11-16 23:48:35 -05:00
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for (uint32_t i = 0; i < copy_words; i++) {
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pbase[i] = mpi->MBEDTLS_PRIVATE(p[i]);
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2020-03-03 02:01:19 -05:00
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}
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/* Zero any remaining memory block data */
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2020-11-16 23:48:35 -05:00
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for (uint32_t i = copy_words; i < hw_words; i++) {
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2020-03-03 02:01:19 -05:00
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pbase[i] = 0;
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}
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}
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/* Read mbedTLS MPI bignum back from hardware memory block.
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Reads num_words words from block.
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Bignum 'x' should already be grown to at least num_words by caller (can be done while
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calculation is in progress, to save some cycles)
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*/
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2020-11-16 23:48:35 -05:00
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static inline void mem_block_to_mpi(mbedtls_mpi *x, uint32_t mem_base, size_t num_words)
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2020-03-03 02:01:19 -05:00
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{
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assert(x->MBEDTLS_PRIVATE(n) >= num_words);
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2020-03-03 02:01:19 -05:00
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/* Copy data from memory block registers */
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esp_dport_access_read_buffer(x->MBEDTLS_PRIVATE(p), mem_base, num_words);
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2020-03-03 02:01:19 -05:00
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/* Zero any remaining limbs in the bignum, if the buffer is bigger
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than num_words */
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2021-08-09 05:58:36 -04:00
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for (size_t i = num_words; i < x->MBEDTLS_PRIVATE(n); i++) {
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x->MBEDTLS_PRIVATE(p[i]) = 0;
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2020-03-03 02:01:19 -05:00
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}
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}
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/* Begin an RSA operation. op_reg specifies which 'START' register
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to write to.
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*/
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static inline void start_op(uint32_t op_reg)
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{
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/* Clear interrupt status */
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DPORT_REG_WRITE(RSA_INTERRUPT_REG, 1);
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/* Note: above REG_WRITE includes a memw, so we know any writes
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to the memory blocks are also complete. */
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DPORT_REG_WRITE(op_reg, 1);
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}
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/* Wait for an RSA operation to complete.
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*/
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2020-03-09 01:58:05 -04:00
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static inline void wait_op_complete(void)
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{
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2020-03-09 01:58:05 -04:00
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while (DPORT_REG_READ(RSA_INTERRUPT_REG) != 1)
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{ }
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2020-03-03 02:01:19 -05:00
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/* clear the interrupt */
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DPORT_REG_WRITE(RSA_INTERRUPT_REG, 1);
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}
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/* Read result from last MPI operation */
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2020-03-09 01:58:05 -04:00
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void esp_mpi_read_result_hw_op(mbedtls_mpi *Z, size_t z_words)
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{
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wait_op_complete();
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mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, z_words);
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}
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/* Z = (X * Y) mod M */
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2020-03-09 01:58:05 -04:00
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void esp_mpi_mul_mpi_mod_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M, const mbedtls_mpi *Rinv, mbedtls_mpi_uint Mprime, size_t hw_words)
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2020-03-03 02:01:19 -05:00
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{
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/* Load M, X, Rinv, Mprime (Mprime is mod 2^32) */
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mpi_to_mem_block(RSA_MEM_M_BLOCK_BASE, M, hw_words);
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, hw_words);
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mpi_to_mem_block(RSA_MEM_RB_BLOCK_BASE, Rinv, hw_words);
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DPORT_REG_WRITE(RSA_M_DASH_REG, (uint32_t)Mprime);
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/* "mode" register loaded with number of 512-bit blocks, minus 1 */
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DPORT_REG_WRITE(RSA_MULT_MODE_REG, (hw_words / 16) - 1);
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/* Execute first stage montgomery multiplication */
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start_op(RSA_MULT_START_REG);
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2020-03-09 01:58:05 -04:00
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wait_op_complete();
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2020-03-03 02:01:19 -05:00
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/* execute second stage */
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2020-03-09 01:58:05 -04:00
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/* Load Y to X input memory block, rerun */
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2020-03-03 02:01:19 -05:00
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, Y, hw_words);
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start_op(RSA_MULT_START_REG);
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}
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/* Z = X * Y */
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2020-03-09 01:58:05 -04:00
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void esp_mpi_mul_mpi_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t hw_words)
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2020-03-03 02:01:19 -05:00
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{
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/* Copy X (right-extended) & Y (left-extended) to memory block */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, hw_words);
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mpi_to_mem_block(RSA_MEM_Z_BLOCK_BASE + hw_words * 4, Y, hw_words);
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/* NB: as Y is left-extended, we don't zero the bottom words_mult words of Y block.
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This is OK for now because zeroing is done by hardware when we do esp_mpi_acquire_hardware().
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*/
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DPORT_REG_WRITE(RSA_M_DASH_REG, 0);
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/* "mode" register loaded with number of 512-bit blocks in result,
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plus 7 (for range 9-12). (this is ((N~ / 32) - 1) + 8))
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*/
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DPORT_REG_WRITE(RSA_MULT_MODE_REG, ((hw_words * 2) / 16) + 7);
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start_op(RSA_MULT_START_REG);
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}
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2020-03-09 01:58:05 -04:00
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int esp_mont_hw_op(mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M,
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mbedtls_mpi_uint Mprime,
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size_t hw_words,
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bool again)
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2020-03-03 02:01:19 -05:00
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{
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// Note Z may be the same pointer as X or Y
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int ret = 0;
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// montgomery mult prepare
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if (again == false) {
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mpi_to_mem_block(RSA_MEM_M_BLOCK_BASE, M, hw_words);
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DPORT_REG_WRITE(RSA_M_DASH_REG, Mprime);
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DPORT_REG_WRITE(RSA_MULT_MODE_REG, hw_words / 16 - 1);
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}
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, hw_words);
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mpi_to_mem_block(RSA_MEM_RB_BLOCK_BASE, Y, hw_words);
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start_op(RSA_MULT_START_REG);
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2021-08-09 05:58:36 -04:00
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Z->MBEDTLS_PRIVATE(s) = 1; // The sign of Z will be = M->s (but M->s is always 1)
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2020-03-03 02:01:19 -05:00
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MBEDTLS_MPI_CHK( mbedtls_mpi_grow(Z, hw_words) );
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wait_op_complete();
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/* Read back the result */
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mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, hw_words);
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/* from HAC 14.36 - 3. If Z >= M then Z = Z - M */
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if (mbedtls_mpi_cmp_mpi(Z, M) >= 0) {
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MBEDTLS_MPI_CHK(mbedtls_mpi_sub_mpi(Z, Z, M));
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}
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2020-03-09 01:58:05 -04:00
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cleanup:
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2020-03-03 02:01:19 -05:00
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return ret;
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}
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/* Special-case of mbedtls_mpi_mult_mpi(), where we use hardware montgomery mod
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multiplication to calculate an mbedtls_mpi_mult_mpi result where either
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A or B are >2048 bits so can't use the standard multiplication method.
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Result (z_words, based on A bits + B bits) must still be less than 4096 bits.
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This case is simpler than the general case modulo multiply of
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esp_mpi_mul_mpi_mod() because we can control the other arguments:
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* Modulus is chosen with M=(2^num_bits - 1) (ie M=R-1), so output
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isn't actually modulo anything.
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* Mprime and Rinv are therefore predictable as follows:
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Mprime = 1
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Rinv = 1
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(See RSA Accelerator section in Technical Reference for more about Mprime, Rinv)
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*/
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2020-03-09 01:58:05 -04:00
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void esp_mpi_mult_mpi_failover_mod_mult_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words)
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2020-03-03 02:01:19 -05:00
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{
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size_t hw_words = num_words;
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/* M = 2^num_words - 1, so block is entirely FF */
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2020-11-16 23:48:35 -05:00
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for (size_t i = 0; i < hw_words; i++) {
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2020-03-03 02:01:19 -05:00
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DPORT_REG_WRITE(RSA_MEM_M_BLOCK_BASE + i * 4, UINT32_MAX);
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}
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/* Mprime = 1 */
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DPORT_REG_WRITE(RSA_M_DASH_REG, 1);
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/* "mode" register loaded with number of 512-bit blocks, minus 1 */
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DPORT_REG_WRITE(RSA_MULT_MODE_REG, (hw_words / 16) - 1);
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/* Load X */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, hw_words);
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2020-03-09 01:58:05 -04:00
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/* Rinv = 1, write first word */
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2020-03-03 02:01:19 -05:00
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DPORT_REG_WRITE(RSA_MEM_RB_BLOCK_BASE, 1);
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2020-03-09 01:58:05 -04:00
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/* Zero out rest of the Rinv words */
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2020-11-16 23:48:35 -05:00
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for (size_t i = 1; i < hw_words; i++) {
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2020-03-03 02:01:19 -05:00
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DPORT_REG_WRITE(RSA_MEM_RB_BLOCK_BASE + i * 4, 0);
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}
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start_op(RSA_MULT_START_REG);
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2020-03-09 01:58:05 -04:00
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wait_op_complete();
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2020-03-03 02:01:19 -05:00
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/* finish the modular multiplication */
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/* Load Y to X input memory block, rerun */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, Y, hw_words);
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start_op(RSA_MULT_START_REG);
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2020-11-10 02:40:01 -05:00
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}
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