esp-idf/components/driver/Kconfig

menu "Driver configurations"

    menu "ADC configuration"

        config ADC_FORCE_XPD_FSM
            bool "Use the FSM to control ADC power"
            default n
            help
                ADC power can be controlled by the FSM instead of software. This allows the ADC to
                be shut off when it is not working leading to lower power consumption. However
                using the FSM control ADC power will increase the noise of ADC.

        config ADC_DISABLE_DAC
            bool "Disable DAC when ADC2 is used on GPIO 25 and 26"
            default y
            help
                If this is set, the ADC2 driver will disable the output of the DAC corresponding to the specified
                channel. This is the default value.

                For testing, disable this option so that we can measure the output of DAC by internal ADC.

    endmenu  # ADC Configuration

    menu "SPI configuration"

        config SPI_MASTER_IN_IRAM
            bool "Place transmitting functions of SPI master into IRAM"
            default n
            select SPI_MASTER_ISR_IN_IRAM
            help
                Normally only the ISR of SPI master is placed in the IRAM, so that it
                can work without the flash when interrupt is triggered.
                For other functions, there's some possibility that the flash cache
                miss when running inside and out of SPI functions, which may increase
                the interval of SPI transactions.
                Enable this to put ``queue_trans``, ``get_trans_result`` and
                ``transmit`` functions into the IRAM to avoid possible cache miss.

                During unit test, this is enabled to measure the ideal case of api.

        config SPI_MASTER_ISR_IN_IRAM
            bool "Place SPI master ISR function into IRAM"
            default y
            help
                Place the SPI master ISR in to IRAM to avoid possible cache miss.

                Also you can forbid the ISR being disabled during flash writing
                access, by add ESP_INTR_FLAG_IRAM when initializing the driver.

        config SPI_SLAVE_IN_IRAM
            bool "Place transmitting functions of SPI slave into IRAM"
            default n
            select SPI_SLAVE_ISR_IN_IRAM
            help
                Normally only the ISR of SPI slave is placed in the IRAM, so that it
                can work without the flash when interrupt is triggered.
                For other functions, there's some possibility that the flash cache
                miss when running inside and out of SPI functions, which may increase
                the interval of SPI transactions.
                Enable this to put ``queue_trans``, ``get_trans_result`` and
                ``transmit`` functions into the IRAM to avoid possible cache miss.

        config SPI_SLAVE_ISR_IN_IRAM
            bool "Place SPI slave ISR function into IRAM"
            default y
            help
                Place the SPI slave ISR in to IRAM to avoid possible cache miss.

                Also you can forbid the ISR being disabled during flash writing
                access, by add ESP_INTR_FLAG_IRAM when initializing the driver.

    endmenu # SPI Configuration

    menu "TWAI configuration"

        config TWAI_ISR_IN_IRAM
            bool "Place TWAI ISR function into IRAM"
            default n
            help
                Place the TWAI ISR in to IRAM. This will allow the ISR to avoid
                cache misses, and also be able to run whilst the cache is disabled
                (such as when writing to SPI Flash).
                Note that if this option is enabled:
                - Users should also set the ESP_INTR_FLAG_IRAM in the driver
                configuration structure when installing the driver (see docs for
                specifics).
                - Alert logging (i.e., setting of the TWAI_ALERT_AND_LOG flag)
                will have no effect.

    endmenu # TWAI Configuration

    menu "UART configuration"

        config UART_ISR_IN_IRAM
            bool "Place UART ISR function into IRAM"
            default n
            help
                If this option is not selected, UART interrupt will be disabled for a long time and
                may cause data lost when doing spi flash operation.

    endmenu # UART Configuration

    menu "RTCIO configuration"
        visible if IDF_TARGET_ESP32

        config RTCIO_SUPPORT_RTC_GPIO_DESC
            bool "Support array `rtc_gpio_desc` for ESP32"
            depends on IDF_TARGET_ESP32
            default n
            help
                The the array `rtc_gpio_desc` will don't compile by default.
                If this option is selected, the array `rtc_gpio_desc` can be compile.
                If user use this array, please enable this configuration.

    endmenu # RTCIO Configuration

    menu "GPIO Configuration"
        visible if IDF_TARGET_ESP32

        config GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
            bool "Support light sleep GPIO pullup/pulldown configuration for ESP32"
            depends on IDF_TARGET_ESP32
            help
                This option is intended to fix the bug that ESP32 is not able to switch to configured
                pullup/pulldown mode in sleep.
                If this option is selected, chip will automatically emulate the behaviour of switching,
                and about 450B of source codes would be placed into IRAM.

    endmenu # GPIO Configuration

endmenu  # Driver configurations
feature(spi_master): allow to place functions into IRAM to get higher efficiency 2018-06-11 07:54:18 -04:00			`menu "Driver configurations"`
fix(adc2): fix cct and xpd configurations to improve precision of ADCs 2018-03-07 02:04:43 -05:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`menu "ADC configuration"`
fix(adc2): fix cct and xpd configurations to improve precision of ADCs 2018-03-07 02:04:43 -05:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`config ADC_FORCE_XPD_FSM`
			`bool "Use the FSM to control ADC power"`
			`default n`
			`help`
			`ADC power can be controlled by the FSM instead of software. This allows the ADC to`
			`be shut off when it is not working leading to lower power consumption. However`
			`using the FSM control ADC power will increase the noise of ADC.`
fix(adc2): fix cct and xpd configurations to improve precision of ADCs 2018-03-07 02:04:43 -05:00
Rename Kconfig options (components/driver) 2019-04-29 08:22:57 -04:00			`config ADC_DISABLE_DAC`
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`bool "Disable DAC when ADC2 is used on GPIO 25 and 26"`
			`default y`
			`help`
Rename Kconfig options (components/driver) 2019-04-29 08:22:57 -04:00			`If this is set, the ADC2 driver will disable the output of the DAC corresponding to the specified`
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`channel. This is the default value.`
bugfix(rtc): make sure peripherals (DAC, HALL) are turned off before conversion. refactor structure of ``rtc_module.c`` to make it more clearly. Closes https://github.com/espressif/esp-idf/issues/1517 2018-01-24 05:46:34 -05:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`For testing, disable this option so that we can measure the output of DAC by internal ADC.`
bugfix(rtc): make sure peripherals (DAC, HALL) are turned off before conversion. refactor structure of ``rtc_module.c`` to make it more clearly. Closes https://github.com/espressif/esp-idf/issues/1517 2018-01-24 05:46:34 -05:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`endmenu # ADC Configuration`
fix(adc2): fix cct and xpd configurations to improve precision of ADCs 2018-03-07 02:04:43 -05:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`menu "SPI configuration"`
fix(adc2): fix cct and xpd configurations to improve precision of ADCs 2018-03-07 02:04:43 -05:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`config SPI_MASTER_IN_IRAM`
			`bool "Place transmitting functions of SPI master into IRAM"`
			`default n`
			`select SPI_MASTER_ISR_IN_IRAM`
			`help`
			`Normally only the ISR of SPI master is placed in the IRAM, so that it`
			`can work without the flash when interrupt is triggered.`
			`For other functions, there's some possibility that the flash cache`
			`miss when running inside and out of SPI functions, which may increase`
			`the interval of SPI transactions.`
			Enable this to put ``queue_trans``, ``get_trans_result`` and
			``transmit`` functions into the IRAM to avoid possible cache miss.
feature(spi_master): allow to place functions into IRAM to get higher efficiency 2018-06-11 07:54:18 -04:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`During unit test, this is enabled to measure the ideal case of api.`
feature(spi_master): allow to place functions into IRAM to get higher efficiency 2018-06-11 07:54:18 -04:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`config SPI_MASTER_ISR_IN_IRAM`
			`bool "Place SPI master ISR function into IRAM"`
			`default y`
			`help`
			`Place the SPI master ISR in to IRAM to avoid possible cache miss.`
spi: fix the crash when callbacks are not in the IRAM Introduced in 9c23b8e5 and 4f87a62f. To get higher speed, menuconfig options are added to put ISR and other functions into the IRAM. The interrupt flag ESP_INTR_FLAG_IRAM is also mistakenly set when the ISR is put into the IRAM. However callbacks, which are wrote by the user, are called in the master and slave ISR. The user may not be aware of that these callbacks are not disabled during flash operations. Any cache miss during flash operation will cause panic. Essentially IRAM functions and intrrupt flag ESP_INTR_FLAG_IRAM are different, the latter means not disabling the ISR during flash operations. New bus_config flag intr_flags is offered to help set the interrupt attribute, including priority level, SHARED, IRAM (not disabled during flash operations). It introduced a small BREAK to IDFv3.1 (but the same as IDFv3.0) that the user has to manually set IRAM flag now (therefore he's aware of the IRAM thing) to void the ISR being disabled during flash operations. 2018-10-23 04:57:32 -04:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`Also you can forbid the ISR being disabled during flash writing`
			`access, by add ESP_INTR_FLAG_IRAM when initializing the driver.`
feature(spi_master): allow to place functions into IRAM to get higher efficiency 2018-06-11 07:54:18 -04:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`config SPI_SLAVE_IN_IRAM`
			`bool "Place transmitting functions of SPI slave into IRAM"`
			`default n`
			`select SPI_SLAVE_ISR_IN_IRAM`
			`help`
			`Normally only the ISR of SPI slave is placed in the IRAM, so that it`
			`can work without the flash when interrupt is triggered.`
			`For other functions, there's some possibility that the flash cache`
			`miss when running inside and out of SPI functions, which may increase`
			`the interval of SPI transactions.`
			Enable this to put ``queue_trans``, ``get_trans_result`` and
			``transmit`` functions into the IRAM to avoid possible cache miss.
spi_slave: add new menuconfig item to decide whether spi slave should be put into IRAM 2018-08-20 06:30:40 -04:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`config SPI_SLAVE_ISR_IN_IRAM`
			`bool "Place SPI slave ISR function into IRAM"`
			`default y`
			`help`
			`Place the SPI slave ISR in to IRAM to avoid possible cache miss.`
spi: fix the crash when callbacks are not in the IRAM Introduced in 9c23b8e5 and 4f87a62f. To get higher speed, menuconfig options are added to put ISR and other functions into the IRAM. The interrupt flag ESP_INTR_FLAG_IRAM is also mistakenly set when the ISR is put into the IRAM. However callbacks, which are wrote by the user, are called in the master and slave ISR. The user may not be aware of that these callbacks are not disabled during flash operations. Any cache miss during flash operation will cause panic. Essentially IRAM functions and intrrupt flag ESP_INTR_FLAG_IRAM are different, the latter means not disabling the ISR during flash operations. New bus_config flag intr_flags is offered to help set the interrupt attribute, including priority level, SHARED, IRAM (not disabled during flash operations). It introduced a small BREAK to IDFv3.1 (but the same as IDFv3.0) that the user has to manually set IRAM flag now (therefore he's aware of the IRAM thing) to void the ISR being disabled during flash operations. 2018-10-23 04:57:32 -04:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`Also you can forbid the ISR being disabled during flash writing`
			`access, by add ESP_INTR_FLAG_IRAM when initializing the driver.`
spi_slave: add new menuconfig item to decide whether spi slave should be put into IRAM 2018-08-20 06:30:40 -04:00
Correct Kconfigs according to the coding style 2019-01-25 11:10:53 -05:00			`endmenu # SPI Configuration`
feature(spi_master): allow to place functions into IRAM to get higher efficiency 2018-06-11 07:54:18 -04:00
TWAI: ISR runs when cache is disabled This commit adds the feature where the TWAI ISR will continue to run even if the cache is disabled. Whilst cache is disabled, any received messages will go into the RX queue, and any pending TX messages in the TX queue will be transmitted. This feature should be enabled using the CONFIG_TWAI_ISR_IN_IRAM option. 2020-08-04 00:52:10 -04:00			`menu "TWAI configuration"`

			`config TWAI_ISR_IN_IRAM`
			`bool "Place TWAI ISR function into IRAM"`
			`default n`
			`help`
			`Place the TWAI ISR in to IRAM. This will allow the ISR to avoid`
			`cache misses, and also be able to run whilst the cache is disabled`
			`(such as when writing to SPI Flash).`
			`Note that if this option is enabled:`
			`- Users should also set the ESP_INTR_FLAG_IRAM in the driver`
			`configuration structure when installing the driver (see docs for`
			`specifics).`
			`- Alert logging (i.e., setting of the TWAI_ALERT_AND_LOG flag)`
			`will have no effect.`

			`endmenu # TWAI Configuration`

uart: add option to put ISR in IRAM 2019-08-26 05:14:15 -04:00			`menu "UART configuration"`

			`config UART_ISR_IN_IRAM`
			`bool "Place UART ISR function into IRAM"`
			`default n`
			`help`
			`If this option is not selected, UART interrupt will be disabled for a long time and`
			`may cause data lost when doing spi flash operation.`

			`endmenu # UART Configuration`

rtcio: add hal for driver 2019-07-25 11:11:31 -04:00			`menu "RTCIO configuration"`
Docs: Omit kconfig configurations not available for the target 2019-12-12 10:02:36 -05:00			`visible if IDF_TARGET_ESP32`
rtcio: add hal for driver 2019-07-25 11:11:31 -04:00
			`config RTCIO_SUPPORT_RTC_GPIO_DESC`
			bool "Support array `rtc_gpio_desc` for ESP32"
			`depends on IDF_TARGET_ESP32`
			`default n`
			`help`
			The the array `rtc_gpio_desc` will don't compile by default.
			If this option is selected, the array `rtc_gpio_desc` can be compile.
			`If user use this array, please enable this configuration.`

			`endmenu # RTCIO Configuration`

components/pm: Add slp gpio configure workaround 2020-11-12 07:39:55 -05:00			`menu "GPIO Configuration"`
			`visible if IDF_TARGET_ESP32`

			`config GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL`
			`bool "Support light sleep GPIO pullup/pulldown configuration for ESP32"`
			`depends on IDF_TARGET_ESP32`
			`help`
			`This option is intended to fix the bug that ESP32 is not able to switch to configured`
			`pullup/pulldown mode in sleep.`
			`If this option is selected, chip will automatically emulate the behaviour of switching,`
			`and about 450B of source codes would be placed into IRAM.`

			`endmenu # GPIO Configuration`

feature(spi_master): allow to place functions into IRAM to get higher efficiency 2018-06-11 07:54:18 -04:00			`endmenu # Driver configurations`