esp-idf/examples/system/ulp/ulp_riscv/interrupts/main/Kconfig.projbuild

menu "ULP RISC-V Interrupt Example Configuration"

    config EXAMPLE_GPIO_INT
        int "GPIO interrupt pin"
        range 0 21
        default 0
        help
            GPIO number to trigger an interrupt on the ULP RISC-V core.

endmenu
feat(ulp-riscv): Added new example to demonstrate ULP RISC-V interrupts This commit adds a new example which demonstrates how the ULP RISC-V co-processor handles interrupts. 2023-12-14 10:15:06 -05:00			`menu "ULP RISC-V Interrupt Example Configuration"`

			`config EXAMPLE_GPIO_INT`
			`int "GPIO interrupt pin"`
			`range 0 21`
			`default 0`
			`help`
			`GPIO number to trigger an interrupt on the ULP RISC-V core.`

			`endmenu`