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https://github.com/espressif/esp-idf.git
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84 lines
2.3 KiB
C
84 lines
2.3 KiB
C
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// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "soc/uart_periph.h"
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#include "soc/gpio_periph.h"
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#include "soc/soc.h"
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#include "esp_gdbstub_common.h"
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#include "sdkconfig.h"
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#define UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
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#define GDBSTUB_MEM_REGION_COUNT 9
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typedef struct {
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intptr_t lower;
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intptr_t upper;
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} mem_bound_t;
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static const mem_bound_t mem_region_table [GDBSTUB_MEM_REGION_COUNT] =
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{
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{SOC_DROM_LOW, SOC_DROM_HIGH},
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{SOC_IROM_LOW, SOC_IROM_HIGH},
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{SOC_IRAM_LOW, SOC_IRAM_HIGH},
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{SOC_DRAM_LOW, SOC_DRAM_HIGH},
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{SOC_IROM_MASK_LOW, SOC_IROM_MASK_HIGH},
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{SOC_DROM_MASK_LOW, SOC_DROM_MASK_HIGH},
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{SOC_RTC_IRAM_LOW, SOC_RTC_IRAM_HIGH},
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// RTC DRAM and RTC DATA are identical with RTC IRAM
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{SOC_PERIPHERAL_LOW, SOC_PERIPHERAL_HIGH},
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{SOC_DEBUG_LOW, SOC_DEBUG_HIGH},
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};
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static inline bool check_inside_valid_region(intptr_t addr)
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{
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for (size_t i = 0; i < GDBSTUB_MEM_REGION_COUNT; i++) {
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if (addr >= mem_region_table[i].lower && addr < mem_region_table[i].upper) {
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return true;
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}
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}
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return false;
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}
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void esp_gdbstub_target_init()
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{
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}
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int esp_gdbstub_getchar()
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{
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while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_RXFIFO_CNT) == 0) {
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;
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}
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return REG_READ(UART_FIFO_AHB_REG(UART_NUM));
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}
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void esp_gdbstub_putchar(int c)
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{
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while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_TXFIFO_CNT) >= 126) {
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;
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}
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REG_WRITE(UART_FIFO_AHB_REG(UART_NUM), c);
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}
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int esp_gdbstub_readmem(intptr_t addr)
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{
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if (!check_inside_valid_region(addr)) {
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/* see esp_cpu_configure_region_protection */
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return -1;
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}
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uint32_t val_aligned = *(uint32_t *)(addr & (~3));
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uint32_t shift = (addr & 3) * 8;
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return (val_aligned >> shift) & 0xff;
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}
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