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esp-idf/components/soc/esp32s2/usb_periph.c

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refactor(soc): Deprecate usb pin mappings usb_pins.h and usb_periph.h/c lists mappings of USB DWC signals to GPIOs used to connect to external FSLS PHYs. However, those signals can be routed to any GPIOs via the GPIO matrix. Thus, these mapping are meaningless and have been deprecated.
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/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
soc: add USB peripheral register definitions, hal level, reg map, etc
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soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.
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#include "soc/soc_caps.h"
soc: add USB peripheral register definitions, hal level, reg map, etc
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#include "soc/usb_periph.h"
refactor(soc): Deprecate usb pin mappings usb_pins.h and usb_periph.h/c lists mappings of USB DWC signals to GPIOs used to connect to external FSLS PHYs. However, those signals can be routed to any GPIOs via the GPIO matrix. Thus, these mapping are meaningless and have been deprecated.
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/*
Note: These IO pins are deprecated. When connecting USB OTG to an external FSLS
PHY, the FSLS Serial Interface signals can be routed to any GPIO via the GPIO
matrix. Thus, this mapping of signals to IO pins is meaningless.
Todo: Remove in IDF v6.0 (IDF-9029)
*/
soc: add USB peripheral register definitions, hal level, reg map, etc
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const usb_iopin_dsc_t usb_periph_iopins[] = {
{USBPHY_VP_NUM, USB_EXTPHY_VP_IDX, 0, 1},
{USBPHY_VM_NUM, USB_EXTPHY_VM_IDX, 0, 1},
{USBPHY_RCV_NUM, USB_EXTPHY_RCV_IDX, 0, 1},
{USBPHY_OEN_NUM, USB_EXTPHY_OEN_IDX, 1, 1},
{USBPHY_VPO_NUM, USB_EXTPHY_VPO_IDX, 1, 1},
{USBPHY_VMO_NUM, USB_EXTPHY_VMO_IDX, 1, 1},
esp_rom: extract common GPIO apis into esp_rom_gpio.h
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{GPIO_MATRIX_CONST_ONE_INPUT, USB_OTG_IDDIG_IN_IDX, 0, 0}, //connected connector is mini-B
soc: add USB peripheral register definitions, hal level, reg map, etc
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//connected connector is mini-B
esp_rom: extract common GPIO apis into esp_rom_gpio.h
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{GPIO_MATRIX_CONST_ONE_INPUT, USB_SRP_BVALID_IN_IDX, 0, 0}, //HIGH to force USB device mode
{GPIO_MATRIX_CONST_ONE_INPUT, USB_OTG_VBUSVALID_IN_IDX, 0, 0}, //receiving a valid Vbus from host
{GPIO_MATRIX_CONST_ZERO_INPUT, USB_OTG_AVALID_IN_IDX, 0, 0},
soc: add USB peripheral register definitions, hal level, reg map, etc
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{-1, -1, 0, 0}
};
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