2018-04-03 03:37:28 -04:00
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// Copyright 2018-2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "esp_coexist.h"
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2019-02-20 08:01:27 -05:00
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#include "esp_coexist_internal.h"
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2018-04-03 03:37:28 -04:00
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2021-01-18 02:55:14 -05:00
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#if CONFIG_EXTERNAL_COEX_ENABLE
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#include "driver/gpio.h"
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#include "esp_rom_gpio.h"
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#include "hal/gpio_hal.h"
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#include "hal/gpio_types.h"
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#include "soc/gpio_periph.h"
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#endif
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2018-04-03 03:37:28 -04:00
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const char *esp_coex_version_get(void)
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{
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return coex_version_get();
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}
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esp_err_t esp_coex_preference_set(esp_coex_prefer_t prefer)
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{
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return coex_preference_set((coex_prefer_t)prefer);
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}
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2021-01-18 02:55:14 -05:00
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#if CONFIG_EXTERNAL_COEX_ENABLE
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#define GPIO_PIN_REG(a) (GPIO_PIN0_REG + a * 0x04)
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esp_err_t esp_enable_extern_coex_gpio_pin(external_coex_wire_t wire_type, esp_external_coex_gpio_set_t gpio_pin)
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{
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switch (wire_type)
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{
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case EXTERN_COEX_WIRE_3:
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{
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/*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX:GPIO_BT_ACTIVE_IDX*/
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO);
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gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT);
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esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false);
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin1], PIN_FUNC_GPIO);
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gpio_set_direction(gpio_pin.in_pin1, GPIO_MODE_INPUT);
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esp_rom_gpio_connect_in_signal(gpio_pin.in_pin1, GPIO_BT_PRIORITY_IDX, false);
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/*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO);
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gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT);
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REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0));
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esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, GPIO_WLAN_ACTIVE_IDX, false, false);
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REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2);
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REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2);
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REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC1_BYPASS, 2);
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REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin1), GPIO_PIN1_SYNC2_BYPASS, 2);
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int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_HIGH);
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if (ESP_OK != ret) {
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return ESP_FAIL;
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}
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break;
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}
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case EXTERN_COEX_WIRE_2:
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{
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/*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX:GPIO_BT_ACTIVE_IDX*/
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO);
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gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT);
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esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false);
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/*Output gpio pin setup --> GPIO_WLAN_ACTIVE_IDX: 1 BT, 0 WiFi*/
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.out_pin0], PIN_FUNC_GPIO);
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gpio_set_direction(gpio_pin.out_pin0, GPIO_MODE_OUTPUT);
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REG_WRITE(GPIO_ENABLE_W1TC_REG, BIT(gpio_pin.out_pin0));
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esp_rom_gpio_connect_out_signal(gpio_pin.out_pin0, GPIO_WLAN_ACTIVE_IDX, false, false);
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REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2);
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REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2);
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int ret = esp_coex_external_set(EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID, EXTERN_COEX_PTI_MID);
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if (ESP_OK != ret) {
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return ESP_FAIL;
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}
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break;
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}
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case EXTERN_COEX_WIRE_1:
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{
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/*Input gpio pin setup --> GPIO_BT_PRIORITY_IDX:GPIO_BT_ACTIVE_IDX*/
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_pin.in_pin0], PIN_FUNC_GPIO);
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gpio_set_direction(gpio_pin.in_pin0, GPIO_MODE_INPUT);
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esp_rom_gpio_connect_in_signal(gpio_pin.in_pin0, GPIO_BT_ACTIVE_IDX, false);
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REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC1_BYPASS, 2);
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REG_SET_FIELD(GPIO_PIN_REG(gpio_pin.in_pin0), GPIO_PIN1_SYNC2_BYPASS, 2);
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int ret = esp_coex_external_set(EXTERN_COEX_PTI_HIGH, EXTERN_COEX_PTI_HIGH, EXTERN_COEX_PTI_HIGH);
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if (ESP_OK != ret) {
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return ESP_FAIL;
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}
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break;
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}
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default:
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{
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return ESP_FAIL;
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}
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}
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return ESP_OK;
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}
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esp_err_t esp_disable_extern_coex_gpio_pin()
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{
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esp_coex_external_stop();
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return ESP_OK;
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}
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#endif/*External Coex*/
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