2021-05-11 23:26:07 -04:00
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menu "LCD and Touch Panel"
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menu "LCD Peripheral Configuration"
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choice LCD_PERIPH_CLK_SRC
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prompt "Select clock source for LCD peripheral"
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default LCD_PERIPH_CLK_SRC_PLL160M
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help
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The peripheral clock is where LCD bus clock derives from.
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Each clock source has its unique feature, e.g.
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1. XTAL clock can help LCD work stable when DFS is enabled
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2. PLL160M can achieve higher pixel clock resolution
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config LCD_PERIPH_CLK_SRC_PLL160M
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bool "PLL_160M clock"
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config LCD_PERIPH_CLK_SRC_XTAL
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bool "XTAL clock"
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endchoice # LCD_PERIPH_CLK_SRC
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2021-08-04 08:11:31 -04:00
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config LCD_PANEL_IO_FORMAT_BUF_SIZE
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int "LCD panel io format buffer size"
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default 32
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help
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LCD driver allocates an internal buffer to transform the data into a proper format, because of
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the endian order mismatch. This option is to set the size of the buffer, in bytes.
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2021-05-11 23:26:07 -04:00
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endmenu
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endmenu
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