esp-idf/tools/test_apps/system/panic/main/CMakeLists.txt

set(srcs "test_app_main.c" "test_panic.c")

if(CONFIG_TEST_MEMPROT)
    list(APPEND srcs "test_memprot.c")
    if(CONFIG_SOC_MEMPROT_SUPPORTED)
        if(CONFIG_IDF_TARGET_ARCH_XTENSA)
            list(APPEND srcs "panic_utils/memprot_panic_utils_xtensa.c")
        elseif(CONFIG_IDF_TARGET_ARCH_RISCV)
            list(APPEND srcs "panic_utils/memprot_panic_utils_riscv.c")
        endif()
    endif()
endif()

idf_component_register(SRCS "${srcs}"
                        INCLUDE_DIRS "include"
                        REQUIRES spi_flash esp_psram esp_system esp_partition espcoredump
                        PRIV_REQUIRES esp_gdbstub)

target_compile_options(${COMPONENT_LIB} PRIVATE "-Wno-unused-variable"
                                                "-Wno-infinite-recursion"
                                                "-Wno-array-bounds")
test_app: Extend `panic` app to include `memprot`-related tests - Add support for esp32s2, esp32c3 and esp32c2 for the `memprot`-related tests - Preliminary support for esp32s3 has also been added, the test app will be enabled for esp32s3 later when the memprot-related issues are fixed. - Override panic handler to dump the violation intr status - Dump the `memprot` violation registers before calling the real panic handler - Handle `Illegal Instruction` exception in case of memprot permission violation * In esp32c3 with `memprot` enabled, if we try to execute arbitrary code from RTC_FAST_MEM we get an `Illegal Instruction` exception from the panic handler rather than a `Memory Protection Fault`. * This is because the Illegal Instruction interrupt occurs earlier than the memory protection interrupt due to a higher interrupt latency. 2023-01-06 00:16:26 -05:00			`set(srcs "test_app_main.c" "test_panic.c")`

			`if(CONFIG_TEST_MEMPROT)`
			`list(APPEND srcs "test_memprot.c")`
			`if(CONFIG_SOC_MEMPROT_SUPPORTED)`
			`if(CONFIG_IDF_TARGET_ARCH_XTENSA)`
			`list(APPEND srcs "panic_utils/memprot_panic_utils_xtensa.c")`
			`elseif(CONFIG_IDF_TARGET_ARCH_RISCV)`
			`list(APPEND srcs "panic_utils/memprot_panic_utils_riscv.c")`
			`endif()`
			`endif()`
			`endif()`

			`idf_component_register(SRCS "${srcs}"`
			`INCLUDE_DIRS "include"`
ci(panic): add flash encrypted coredump tests 2024-04-29 12:32:00 -04:00			`REQUIRES spi_flash esp_psram esp_system esp_partition espcoredump`
tools: setting components to main to reduce build time 2023-03-22 02:25:40 -04:00			`PRIV_REQUIRES esp_gdbstub)`
feat(esp_system): implement hw stack guard for riscv chips - add hardware stack guard based on assist-debug module - enable hardware stack guard by default - disable hardware stack guard for freertos ci.release test - refactor rtos_int_enter/rtos_int_exit to change SP register inside them - fix panic_reason.h header for RISC-V - update docs to include information about the new feature 2023-05-04 11:31:31 -04:00
			`target_compile_options(${COMPONENT_LIB} PRIVATE "-Wno-unused-variable"`
fix(tools): fix panic test gcc 13.1.0 warnings 2023-07-18 05:40:20 -04:00			`"-Wno-infinite-recursion"`
			`"-Wno-array-bounds")`