esp-idf/components/esp_rom/esp32c2/Kconfig.soc_caps.in

#####################################################
# This file is auto-generated from SoC caps
# using gen_soc_caps_kconfig.py, do not edit manually
#####################################################

config ESP_ROM_HAS_CRC_LE
    bool
    default y

config ESP_ROM_HAS_CRC_BE
    bool
    default y

config ESP_ROM_UART_CLK_IS_XTAL
    bool
    default y

config ESP_ROM_HAS_RETARGETABLE_LOCKING
    bool
    default y

config ESP_ROM_GET_CLK_FREQ
    bool
    default y

config ESP_ROM_HAS_RVFPLIB
    bool
    default y

config ESP_ROM_HAS_HAL_WDT
    bool
    default y

config ESP_ROM_HAS_HAL_SYSTIMER
    bool
    default y

config ESP_ROM_HAS_HEAP_TLSF
    bool
    default y

config ESP_ROM_TLSF_CHECK_PATCH
    bool
    default y

config ESP_ROM_MULTI_HEAP_WALK_PATCH
    bool
    default y

config ESP_ROM_HAS_LAYOUT_TABLE
    bool
    default y

config ESP_ROM_HAS_SPI_FLASH
    bool
    default y

config ESP_ROM_HAS_NEWLIB
    bool
    default y

config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
    bool
    default y

config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
    bool
    default y

config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
    bool
    default y

config ESP_ROM_HAS_MBEDTLS_CRYPTO_LIB
    bool
    default y

config ESP_ROM_HAS_SW_FLOAT
    bool
    default y

config ESP_ROM_USB_OTG_NUM
    int
    default -1

config ESP_ROM_USB_SERIAL_DEVICE_NUM
    int
    default -1

config ESP_ROM_HAS_VERSION
    bool
    default y
build-system: include soc_caps defines into kconfig Adds gen_soc_caps_kconfig.py which parses the soc caps (soc_caps.h) into a format that can be included in kconfig. 2021-11-05 05:23:24 -04:00			`#####################################################`
			`# This file is auto-generated from SoC caps`
			`# using gen_soc_caps_kconfig.py, do not edit manually`
			`#####################################################`

			`config ESP_ROM_HAS_CRC_LE`
			`bool`
			`default y`

			`config ESP_ROM_HAS_CRC_BE`
			`bool`
			`default y`

			`config ESP_ROM_UART_CLK_IS_XTAL`
			`bool`
			`default y`

			`config ESP_ROM_HAS_RETARGETABLE_LOCKING`
			`bool`
			`default y`

			`config ESP_ROM_GET_CLK_FREQ`
			`bool`
			`default y`
esp32c2: Support riscv floating-point library selection 2022-05-08 05:57:40 -04:00
			`config ESP_ROM_HAS_RVFPLIB`
			`bool`
			`default y`
hal: use ROM implementation for systimer and wdt on esp32c2 2022-05-06 06:57:14 -04:00
			`config ESP_ROM_HAS_HAL_WDT`
			`bool`
			`default y`

			`config ESP_ROM_HAS_HAL_SYSTIMER`
			`bool`
			`default y`
heap: use ROM implementation for heap tlsf on esp32c2 2022-05-06 07:20:05 -04:00
			`config ESP_ROM_HAS_HEAP_TLSF`
			`bool`
			`default y`
esp-rom: create a patch of tlsf_check() for target(s) supporting ROM implementation of TLSF The tlsf implementation in the ROM does not provide a mechanism to register a callback to be called in by tlsf_check(). This commit is creating a patch of the tlsf implementation to provide a definition of the function allowing to register the callback called in tlsf_check() and add the call of this callback in tlsf_check(). This patch is only compiled for target(s) with ESP_ROM_HAS_HEAP_TLSF set and ESP_ROM_TLSF_CHECK_PATCH set. For all the other configurations the environment remains unchanged by those modifications. 2022-08-12 05:28:16 -04:00
feat(esp_rom): patch heap walker to the ROM implementation modify existing patch of TLSF rom and add multi heap patch to add the walker feature to the ROM implementation of the heap component. 2024-03-19 08:56:32 -04:00			`config ESP_ROM_TLSF_CHECK_PATCH`
			`bool`
			`default y`

feat(heap): Add walker to the heap component Introduce new APIs in essp_heap_caps.h: - heap_caps_walk() - heap_caps_walk_all() Those functions are triggering a callback for all blocks (allocated or free) of memory present in heaps meeting the set of capabilities passed as parameter (or all heaps for heap_caps_walk_all() function) test_walker.c added to test the new functionality in test_apps/heap_test/ 2024-02-14 07:03:09 -05:00			`config ESP_ROM_MULTI_HEAP_WALK_PATCH`
			`bool`
			`default y`

esp32c6: add esp_rom support (rom version: esp32c6-20220901) 2022-07-12 08:28:06 -04:00			`config ESP_ROM_HAS_LAYOUT_TABLE`
			`bool`
			`default y`

			`config ESP_ROM_HAS_SPI_FLASH`
			`bool`
			`default y`
newlib: update newlib nano documentation for C6 C6 ROM has the the full IO formatting functions included. 2023-02-02 04:24:31 -05:00
refactor(esp_rom): refactor rom LD inclusions to make it easier to add new targets 2024-03-01 02:53:20 -05:00			`config ESP_ROM_HAS_NEWLIB`
			`bool`
			`default y`

newlib: update newlib nano documentation for C6 C6 ROM has the the full IO formatting functions included. 2023-02-02 04:24:31 -05:00			`config ESP_ROM_HAS_NEWLIB_NANO_FORMAT`
			`bool`
			`default y`
esp_rom: add macro ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE for S3/C3/C2/C6/H2/H4 2023-03-06 03:49:10 -05:00
			`config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE`
			`bool`
			`default y`
system: fixed ram app cannot use mmu correctly issue 2023-03-09 01:45:45 -05:00
			`config ESP_ROM_RAM_APP_NEEDS_MMU_INIT`
			`bool`
			`default y`
feat(mbedtls): support C2 mbedtls can use crypto algorithm in ROM 2023-08-08 08:58:44 -04:00
			`config ESP_ROM_HAS_MBEDTLS_CRYPTO_LIB`
			`bool`
			`default y`
ci(system): fixed and enabled misc system build tests 2023-11-27 23:10:55 -05:00
			`config ESP_ROM_HAS_SW_FLOAT`
			`bool`
			`default y`
fix(uart,usj...): Fix wrong serial number that has been parsed to rom functions, Closes https://github.com/espressif/esp-idf/issues/12958 2024-01-17 04:19:49 -05:00
			`config ESP_ROM_USB_OTG_NUM`
			`int`
			`default -1`

			`config ESP_ROM_USB_SERIAL_DEVICE_NUM`
			`int`
			`default -1`
refactor(esp_rom): refactor rom LD inclusions to make it easier to add new targets 2024-03-01 02:53:20 -05:00
			`config ESP_ROM_HAS_VERSION`
			`bool`
			`default y`