2021-10-29 00:39:53 -04:00
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/*
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* Multi-precision integer library
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* ESP32 S2 hardware accelerated parts based on mbedTLS implementation
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2020-03-03 02:01:19 -05:00
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*
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2021-10-29 00:39:53 -04:00
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* SPDX-FileCopyrightText: The Mbed TLS Contributors
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2020-03-03 02:01:19 -05:00
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*
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2021-10-29 00:39:53 -04:00
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* SPDX-License-Identifier: Apache-2.0
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2020-03-03 02:01:19 -05:00
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*
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2022-03-02 23:04:39 -05:00
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* SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
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2020-03-03 02:01:19 -05:00
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*/
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#include "soc/hwcrypto_periph.h"
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2021-10-25 05:13:46 -04:00
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#include "esp_private/periph_ctrl.h"
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2020-03-03 02:01:19 -05:00
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#include <mbedtls/bignum.h>
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#include "bignum_impl.h"
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2020-03-03 02:01:19 -05:00
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#include "soc/dport_reg.h"
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#include "soc/periph_defs.h"
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#include <sys/param.h>
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#include "esp_crypto_lock.h"
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2020-03-03 02:01:19 -05:00
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2020-03-09 01:58:05 -04:00
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size_t esp_mpi_hardware_words(size_t words)
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2020-03-03 02:01:19 -05:00
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{
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return words;
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}
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2020-03-09 01:58:05 -04:00
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void esp_mpi_enable_hardware_hw_op( void )
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{
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esp_crypto_mpi_lock_acquire();
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2020-03-03 02:01:19 -05:00
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/* Enable RSA hardware */
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periph_module_enable(PERIPH_RSA_MODULE);
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DPORT_REG_CLR_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_MEM_PD);
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while (DPORT_REG_READ(RSA_QUERY_CLEAN_REG) != 1) {
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2020-03-03 02:01:19 -05:00
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}
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// Note: from enabling RSA clock to here takes about 1.3us
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2021-12-27 23:04:05 -05:00
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REG_WRITE(RSA_INTERRUPT_REG, 0);
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2020-03-03 02:01:19 -05:00
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}
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void esp_mpi_disable_hardware_hw_op( void )
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{
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DPORT_REG_SET_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD);
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/* Disable RSA hardware */
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periph_module_disable(PERIPH_RSA_MODULE);
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esp_crypto_mpi_lock_release();
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}
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2021-12-27 23:04:05 -05:00
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void esp_mpi_interrupt_enable( bool enable )
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{
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REG_WRITE(RSA_INTERRUPT_REG, enable);
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}
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void esp_mpi_interrupt_clear( void )
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{
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REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
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}
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/* Copy mbedTLS MPI bignum 'mpi' to hardware memory block at 'mem_base'.
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If num_words is higher than the number of words in the bignum then
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these additional words will be zeroed in the memory buffer.
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*/
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static inline void mpi_to_mem_block(uint32_t mem_base, const mbedtls_mpi *mpi, size_t num_words)
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{
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uint32_t *pbase = (uint32_t *)mem_base;
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uint32_t copy_words = MIN(num_words, mpi->MBEDTLS_PRIVATE(n));
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/* Copy MPI data to memory block registers */
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for (uint32_t i = 0; i < copy_words; i++) {
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pbase[i] = mpi->MBEDTLS_PRIVATE(p)[i];
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}
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/* Zero any remaining memory block data */
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for (uint32_t i = copy_words; i < num_words; i++) {
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pbase[i] = 0;
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}
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}
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/* Read mbedTLS MPI bignum back from hardware memory block.
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Reads num_words words from block.
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*/
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static inline void mem_block_to_mpi(mbedtls_mpi *x, uint32_t mem_base, int num_words)
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{
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/* Copy data from memory block registers */
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esp_dport_access_read_buffer(x->MBEDTLS_PRIVATE(p), mem_base, num_words);
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/* Zero any remaining limbs in the bignum, if the buffer is bigger
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than num_words */
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for (size_t i = num_words; i < x->MBEDTLS_PRIVATE(n); i++) {
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x->MBEDTLS_PRIVATE(p)[i] = 0;
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}
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}
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/* Begin an RSA operation. op_reg specifies which 'START' register
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to write to.
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*/
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static inline void start_op(uint32_t op_reg)
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{
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/* Clear interrupt status */
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DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
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/* Note: above REG_WRITE includes a memw, so we know any writes
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to the memory blocks are also complete. */
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DPORT_REG_WRITE(op_reg, 1);
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}
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/* Wait for an RSA operation to complete.
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*/
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static inline void wait_op_complete(void)
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{
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while (DPORT_REG_READ(RSA_QUERY_INTERRUPT_REG) != 1)
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{ }
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/* clear the interrupt */
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DPORT_REG_WRITE(RSA_CLEAR_INTERRUPT_REG, 1);
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}
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/* Read result from last MPI operation */
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void esp_mpi_read_result_hw_op(mbedtls_mpi *Z, size_t z_words)
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{
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wait_op_complete();
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mem_block_to_mpi(Z, RSA_MEM_Z_BLOCK_BASE, z_words);
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}
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/* Z = (X * Y) mod M
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Not an mbedTLS function
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*/
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void esp_mpi_mul_mpi_mod_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M, const mbedtls_mpi *Rinv, mbedtls_mpi_uint Mprime, size_t num_words)
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{
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DPORT_REG_WRITE(RSA_LENGTH_REG, (num_words - 1));
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/* Load M, X, Rinv, Mprime (Mprime is mod 2^32) */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
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mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words);
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mpi_to_mem_block(RSA_MEM_M_BLOCK_BASE, M, num_words);
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mpi_to_mem_block(RSA_MEM_RB_BLOCK_BASE, Rinv, num_words);
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DPORT_REG_WRITE(RSA_M_DASH_REG, Mprime);
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start_op(RSA_MOD_MULT_START_REG);
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}
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/* Z = (X ^ Y) mod M
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*/
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void esp_mpi_exp_mpi_mod_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, const mbedtls_mpi *M, const mbedtls_mpi *Rinv, mbedtls_mpi_uint Mprime, size_t num_words)
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{
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size_t y_bits = mbedtls_mpi_bitlen(Y);
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DPORT_REG_WRITE(RSA_LENGTH_REG, (num_words - 1));
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/* Load M, X, Rinv, Mprime (Mprime is mod 2^32) */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
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mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words);
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mpi_to_mem_block(RSA_MEM_M_BLOCK_BASE, M, num_words);
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mpi_to_mem_block(RSA_MEM_RB_BLOCK_BASE, Rinv, num_words);
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DPORT_REG_WRITE(RSA_M_DASH_REG, Mprime);
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/* Enable acceleration options */
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DPORT_REG_WRITE(RSA_CONSTANT_TIME_REG, 0);
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DPORT_REG_WRITE(RSA_SEARCH_OPEN_REG, 1);
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DPORT_REG_WRITE(RSA_SEARCH_POS_REG, y_bits - 1);
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/* Execute first stage montgomery multiplication */
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start_op(RSA_MODEXP_START_REG);
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DPORT_REG_WRITE(RSA_SEARCH_OPEN_REG, 0);
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}
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/* Z = X * Y */
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void esp_mpi_mul_mpi_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words)
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{
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/* Copy X (right-extended) & Y (left-extended) to memory block */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
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mpi_to_mem_block(RSA_MEM_Z_BLOCK_BASE + num_words * 4, Y, num_words);
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/* NB: as Y is left-extended, we don't zero the bottom words_mult words of Y block.
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This is OK for now because zeroing is done by hardware when we do esp_mpi_acquire_hardware().
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*/
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2020-03-09 01:58:05 -04:00
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DPORT_REG_WRITE(RSA_LENGTH_REG, (num_words * 2 - 1));
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2020-03-03 02:01:19 -05:00
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start_op(RSA_MULT_START_REG);
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}
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2020-03-09 01:58:05 -04:00
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/**
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* @brief Special-case of (X * Y), where we use hardware montgomery mod
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multiplication to calculate result where either A or B are >2048 bits so
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can't use the standard multiplication method.
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*
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*/
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void esp_mpi_mult_mpi_failover_mod_mult_hw_op(const mbedtls_mpi *X, const mbedtls_mpi *Y, size_t num_words)
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{
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/* M = 2^num_words - 1, so block is entirely FF */
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for (size_t i = 0; i < num_words; i++) {
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2020-03-03 02:01:19 -05:00
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DPORT_REG_WRITE(RSA_MEM_M_BLOCK_BASE + i * 4, UINT32_MAX);
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}
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/* Mprime = 1 */
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DPORT_REG_WRITE(RSA_M_DASH_REG, 1);
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2020-03-09 01:58:05 -04:00
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DPORT_REG_WRITE(RSA_LENGTH_REG, num_words - 1);
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/* Load X & Y */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
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mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words);
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2020-03-09 01:58:05 -04:00
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/* Rinv = 1, write first word */
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DPORT_REG_WRITE(RSA_MEM_RB_BLOCK_BASE, 1);
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/* Zero out rest of the Rinv words */
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for (size_t i = 1; i < num_words; i++) {
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DPORT_REG_WRITE(RSA_MEM_RB_BLOCK_BASE + i * 4, 0);
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}
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start_op(RSA_MOD_MULT_START_REG);
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}
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