2022-04-29 00:10:05 -04:00
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2017-01-09 09:50:42 -05:00
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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2018-08-14 07:39:30 -04:00
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#include <fcntl.h>
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#include <sys/termios.h>
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#include <sys/errno.h>
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2017-01-09 09:50:42 -05:00
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#include "unity.h"
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2020-07-13 09:33:23 -04:00
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#include "esp_rom_uart.h"
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2017-01-09 09:50:42 -05:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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2017-08-28 20:23:40 -04:00
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#include "freertos/semphr.h"
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#include "driver/uart.h"
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2022-11-09 05:23:49 -05:00
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#include "hal/uart_ll.h"
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2017-08-28 20:23:40 -04:00
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#include "esp_vfs_dev.h"
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2018-08-14 07:39:30 -04:00
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#include "esp_vfs.h"
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2023-04-23 03:49:59 -04:00
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#include "esp_clk_tree.h"
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2022-05-20 06:16:47 -04:00
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#include "test_utils.h"
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2017-01-09 09:50:42 -05:00
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#include "sdkconfig.h"
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2023-01-19 01:47:44 -05:00
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#if !CONFIG_IDF_TARGET_ESP32H2 // IDF-6782
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2017-01-09 09:50:42 -05:00
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static void fwrite_str_loopback(const char* str, size_t size)
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{
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2020-07-13 09:33:23 -04:00
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esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
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2022-11-09 05:23:49 -05:00
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uart_ll_set_loop_back(&UART0, 1);
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2017-01-09 09:50:42 -05:00
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fwrite(str, 1, size, stdout);
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fflush(stdout);
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2020-07-13 09:33:23 -04:00
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esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
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2017-01-09 09:50:42 -05:00
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vTaskDelay(2 / portTICK_PERIOD_MS);
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2022-11-09 05:23:49 -05:00
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uart_ll_set_loop_back(&UART0, 0);
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2017-01-09 09:50:42 -05:00
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}
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2019-07-16 05:33:30 -04:00
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static void flush_stdin_stdout(void)
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2017-01-09 09:50:42 -05:00
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{
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vTaskDelay(10 / portTICK_PERIOD_MS);
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2023-03-23 23:42:01 -04:00
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char bitbucket[UART_HW_FIFO_LEN(CONFIG_ESP_CONSOLE_UART_NUM)];
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while (fread(bitbucket, 1, UART_HW_FIFO_LEN(CONFIG_ESP_CONSOLE_UART_NUM), stdin) > 0) {
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2017-01-09 09:50:42 -05:00
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;
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}
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fflush(stdout);
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2020-07-13 09:33:23 -04:00
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esp_rom_uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
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2017-01-09 09:50:42 -05:00
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}
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TEST_CASE("can read from stdin", "[vfs]")
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{
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flush_stdin_stdout();
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const size_t count = 12;
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srand(count);
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2017-05-10 03:24:40 -04:00
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char* data = (char*) calloc(1, count * 8 + 2);
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char* buf = (char*) calloc(1, count * 8 + 2);
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2017-01-09 09:50:42 -05:00
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char* p = data;
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for (size_t i = 0; i < count; ++i) {
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p += sprintf(p, "%08x", rand());
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}
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p += sprintf(p, "\n");
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size_t len = p - data;
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fwrite_str_loopback(data, len);
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size_t cb = fread(buf, 1, len, stdin);
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TEST_ASSERT_EQUAL(len, cb);
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TEST_ASSERT_EQUAL_UINT8_ARRAY(data, buf, len);
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2017-05-10 03:24:40 -04:00
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free(data);
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free(buf);
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2017-01-09 09:50:42 -05:00
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}
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TEST_CASE("CRs are removed from the stdin correctly", "[vfs]")
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{
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2020-06-09 05:00:47 -04:00
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esp_vfs_dev_uart_port_set_rx_line_endings(CONFIG_ESP_CONSOLE_UART_NUM, ESP_LINE_ENDINGS_CRLF);
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esp_vfs_dev_uart_port_set_tx_line_endings(CONFIG_ESP_CONSOLE_UART_NUM, ESP_LINE_ENDINGS_CRLF);
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2017-08-28 20:23:40 -04:00
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2017-01-09 09:50:42 -05:00
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flush_stdin_stdout();
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const char* send_str = "1234567890\n\r123\r\n4\n";
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/* with CONFIG_NEWLIB_STDOUT_ADDCR, the following will be sent on the wire.
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* (last character of each part is marked with a hat)
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*
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* 1234567890\r\n\r123\r\r\n4\r\n
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* ^ ^^ ^
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*/
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char buf[128];
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char* dst = buf;
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fwrite_str_loopback(send_str, 11); // send up to the first \n
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size_t rb = fread(dst, 1, 5, stdin); // read first 5
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TEST_ASSERT_EQUAL(5, rb);
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dst += rb;
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rb = fread(dst, 1, 6, stdin); // ask for 6
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TEST_ASSERT_EQUAL(6, rb); // get 6
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2020-11-10 02:40:01 -05:00
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2017-01-09 09:50:42 -05:00
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TEST_ASSERT_EQUAL_UINT8_ARRAY("1234567890\n", buf, 11);
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dst += rb;
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rb = fread(dst, 1, 2, stdin); // any more characters?
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TEST_ASSERT_EQUAL(0, rb); // nothing
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fwrite_str_loopback(send_str + 11, 1); // send the '\r'
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vTaskDelay(10 / portTICK_PERIOD_MS);
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rb = fread(dst, 1, 2, stdin); // try to get somthing
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TEST_ASSERT_EQUAL(0, rb); // still nothing (\r is buffered)
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fwrite_str_loopback(send_str + 12, 1); // Now send the '1'
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vTaskDelay(10 / portTICK_PERIOD_MS);
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rb = fread(dst, 1, 2, stdin); // try again
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TEST_ASSERT_EQUAL(2, rb); // get two characters
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TEST_ASSERT_EQUAL_UINT8_ARRAY("\r1", dst, 2);
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dst += rb;
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2020-11-10 02:40:01 -05:00
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2017-01-09 09:50:42 -05:00
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fwrite_str_loopback(send_str + 13, 6); // Send the rest
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vTaskDelay(10 / portTICK_PERIOD_MS);
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rb = fread(dst, 1, 4, stdin); // consume "23\r\n"
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TEST_ASSERT_EQUAL(4, rb);
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TEST_ASSERT_EQUAL_UINT8_ARRAY("23\r\n", dst, 4);
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dst += rb;
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rb = fread(dst, 1, 4, stdin); // ask for more than the remainder
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TEST_ASSERT_EQUAL(2, rb);
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TEST_ASSERT_EQUAL_UINT8_ARRAY("4\n", dst, 2);
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}
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2023-01-19 01:47:44 -05:00
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#endif
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2017-01-09 09:50:42 -05:00
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2021-09-01 20:45:19 -04:00
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struct read_task_arg_t {
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char* out_buffer;
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size_t out_buffer_len;
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SemaphoreHandle_t ready;
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SemaphoreHandle_t done;
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};
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struct write_task_arg_t {
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const char* str;
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SemaphoreHandle_t done;
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};
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2023-01-19 01:47:44 -05:00
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#if !CONFIG_IDF_TARGET_ESP32H2 // IDF-6782
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2021-09-01 20:45:19 -04:00
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static void read_task_fn(void* varg)
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2017-08-28 20:23:40 -04:00
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{
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2021-09-01 20:45:19 -04:00
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struct read_task_arg_t* parg = (struct read_task_arg_t*) varg;
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parg->out_buffer[0] = 0;
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2017-08-28 20:23:40 -04:00
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2021-09-01 20:45:19 -04:00
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fgets(parg->out_buffer, parg->out_buffer_len, stdin);
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xSemaphoreGive(parg->done);
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vTaskDelete(NULL);
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}
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2017-08-28 20:23:40 -04:00
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2021-09-01 20:45:19 -04:00
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static void write_task_fn(void* varg)
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{
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struct write_task_arg_t* parg = (struct write_task_arg_t*) varg;
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fwrite_str_loopback(parg->str, strlen(parg->str));
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xSemaphoreGive(parg->done);
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vTaskDelete(NULL);
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}
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2017-08-28 20:23:40 -04:00
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2021-09-01 20:45:19 -04:00
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TEST_CASE("can write to UART while another task is reading", "[vfs]")
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{
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2017-08-28 20:23:40 -04:00
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char out_buffer[32];
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size_t out_buffer_len = sizeof(out_buffer);
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struct read_task_arg_t read_arg = {
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.out_buffer = out_buffer,
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.out_buffer_len = out_buffer_len,
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.done = xSemaphoreCreateBinary()
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};
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2017-01-09 09:50:42 -05:00
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2017-08-28 20:23:40 -04:00
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struct write_task_arg_t write_arg = {
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.str = "!(@*#&(!*@&#((SDasdkjhadsl\n",
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.done = xSemaphoreCreateBinary()
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};
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flush_stdin_stdout();
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2019-04-30 06:51:55 -04:00
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ESP_ERROR_CHECK( uart_driver_install(CONFIG_ESP_CONSOLE_UART_NUM,
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2017-08-28 20:23:40 -04:00
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256, 0, 0, NULL, 0) );
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2019-04-30 06:51:55 -04:00
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esp_vfs_dev_uart_use_driver(CONFIG_ESP_CONSOLE_UART_NUM);
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2017-08-28 20:23:40 -04:00
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xTaskCreate(&read_task_fn, "vfs_read", 4096, &read_arg, 5, NULL);
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vTaskDelay(10);
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xTaskCreate(&write_task_fn, "vfs_write", 4096, &write_arg, 6, NULL);
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int res = xSemaphoreTake(write_arg.done, 100 / portTICK_PERIOD_MS);
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TEST_ASSERT(res);
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res = xSemaphoreTake(read_arg.done, 100 / portTICK_PERIOD_MS);
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TEST_ASSERT(res);
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TEST_ASSERT_EQUAL(0, strcmp(write_arg.str, read_arg.out_buffer));
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2019-04-30 06:51:55 -04:00
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esp_vfs_dev_uart_use_nonblocking(CONFIG_ESP_CONSOLE_UART_NUM);
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uart_driver_delete(CONFIG_ESP_CONSOLE_UART_NUM);
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2017-08-28 20:23:40 -04:00
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vSemaphoreDelete(read_arg.done);
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vSemaphoreDelete(write_arg.done);
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}
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2023-01-19 01:47:44 -05:00
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#endif
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2018-08-14 07:39:30 -04:00
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2019-12-10 07:50:04 -05:00
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TEST_CASE("fcntl supported in UART VFS", "[vfs]")
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{
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int flags = fcntl(STDIN_FILENO, F_GETFL, 0);
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TEST_ASSERT_NOT_EQUAL(-1, flags);
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int res = fcntl(STDIN_FILENO, F_SETFL, flags | O_NONBLOCK);
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TEST_ASSERT_NOT_EQUAL(-1, res);
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/* revert */
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res = fcntl(STDIN_FILENO, F_SETFL, flags);
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TEST_ASSERT_NOT_EQUAL(-1, res);
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}
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2023-01-19 01:47:44 -05:00
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#if !CONFIG_IDF_TARGET_ESP32H2 // IDF-6782
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2019-07-02 11:14:58 -04:00
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#ifdef CONFIG_VFS_SUPPORT_TERMIOS
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2018-08-14 07:39:30 -04:00
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TEST_CASE("Can use termios for UART", "[vfs]")
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{
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2023-01-18 22:43:05 -05:00
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uint32_t clk_src_hz = 0;
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2023-04-23 03:49:59 -04:00
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TEST_ESP_OK(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)UART_SCLK_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz));
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2018-08-14 07:39:30 -04:00
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uart_config_t uart_config = {
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.baud_rate = 115200,
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.data_bits = UART_DATA_8_BITS,
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.parity = UART_PARITY_DISABLE,
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.stop_bits = UART_STOP_BITS_1,
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2019-04-17 08:19:44 -04:00
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.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
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2022-04-29 00:10:05 -04:00
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.source_clk = UART_SCLK_DEFAULT,
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2018-08-14 07:39:30 -04:00
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};
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uart_driver_install(UART_NUM_1, 256, 256, 0, NULL, 0);
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2019-04-17 08:19:44 -04:00
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uart_param_config(UART_NUM_1, &uart_config);
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2018-08-14 07:39:30 -04:00
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const int uart_fd = open("/dev/uart/1", O_RDWR);
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TEST_ASSERT_NOT_EQUAL_MESSAGE(uart_fd, -1, "Cannot open UART");
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esp_vfs_dev_uart_use_driver(1);
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TEST_ASSERT_EQUAL(-1, tcgetattr(uart_fd, NULL));
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TEST_ASSERT_EQUAL(EINVAL, errno);
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struct termios tios, tios_result;
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TEST_ASSERT_EQUAL(-1, tcgetattr(-1, &tios));
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TEST_ASSERT_EQUAL(EBADF, errno);
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TEST_ASSERT_EQUAL(0, tcgetattr(uart_fd, &tios));
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TEST_ASSERT_EQUAL(0, tcsetattr(uart_fd, TCSADRAIN, &tios));
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TEST_ASSERT_EQUAL(0, tcsetattr(uart_fd, TCSAFLUSH, &tios));
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tios.c_iflag |= IGNCR;
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TEST_ASSERT_EQUAL(0, tcsetattr(uart_fd, TCSANOW, &tios));
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tios.c_iflag &= (~IGNCR);
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TEST_ASSERT_EQUAL(0, tcgetattr(uart_fd, &tios_result));
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TEST_ASSERT_EQUAL(IGNCR, tios_result.c_iflag & IGNCR);
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memset(&tios_result, 0xFF, sizeof(struct termios));
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tios.c_iflag |= ICRNL;
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TEST_ASSERT_EQUAL(0, tcsetattr(uart_fd, TCSANOW, &tios));
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tios.c_iflag &= (~ICRNL);
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TEST_ASSERT_EQUAL(0, tcgetattr(uart_fd, &tios_result));
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TEST_ASSERT_EQUAL(ICRNL, tios_result.c_iflag & ICRNL);
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memset(&tios_result, 0xFF, sizeof(struct termios));
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{
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uart_word_length_t data_bit;
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uart_stop_bits_t stop_bits;
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uart_parity_t parity_mode;
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tios.c_cflag &= (~CSIZE);
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tios.c_cflag &= (~CSTOPB);
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tios.c_cflag &= (~PARENB);
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tios.c_cflag |= CS6;
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TEST_ASSERT_EQUAL(0, tcsetattr(uart_fd, TCSANOW, &tios));
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tios.c_cflag &= (~CSIZE);
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TEST_ASSERT_EQUAL(0, tcgetattr(uart_fd, &tios_result));
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TEST_ASSERT_EQUAL(CS6, tios_result.c_cflag & CS6);
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TEST_ASSERT_EQUAL(ESP_OK, uart_get_word_length(UART_NUM_1, &data_bit));
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TEST_ASSERT_EQUAL(UART_DATA_6_BITS, data_bit);
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TEST_ASSERT_EQUAL(0, tios_result.c_cflag & CSTOPB);
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TEST_ASSERT_EQUAL(ESP_OK, uart_get_stop_bits(UART_NUM_1, &stop_bits));
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TEST_ASSERT_EQUAL(UART_STOP_BITS_1, stop_bits);
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|
|
TEST_ASSERT_EQUAL(ESP_OK, uart_get_parity(UART_NUM_1, &parity_mode));
|
|
|
|
TEST_ASSERT_EQUAL(UART_PARITY_DISABLE, parity_mode);
|
|
|
|
memset(&tios_result, 0xFF, sizeof(struct termios));
|
|
|
|
}
|
|
|
|
|
|
|
|
{
|
|
|
|
uart_stop_bits_t stop_bits;
|
|
|
|
uart_parity_t parity_mode;
|
|
|
|
|
|
|
|
tios.c_cflag |= CSTOPB;
|
|
|
|
tios.c_cflag |= (PARENB | PARODD);
|
|
|
|
TEST_ASSERT_EQUAL(0, tcsetattr(uart_fd, TCSANOW, &tios));
|
|
|
|
tios.c_cflag &= (~(CSTOPB | PARENB | PARODD));
|
|
|
|
TEST_ASSERT_EQUAL(0, tcgetattr(uart_fd, &tios_result));
|
|
|
|
TEST_ASSERT_EQUAL(CSTOPB, tios_result.c_cflag & CSTOPB);
|
|
|
|
TEST_ASSERT_EQUAL(ESP_OK, uart_get_stop_bits(UART_NUM_1, &stop_bits));
|
|
|
|
TEST_ASSERT_EQUAL(UART_STOP_BITS_2, stop_bits);
|
|
|
|
TEST_ASSERT_EQUAL(ESP_OK, uart_get_parity(UART_NUM_1, &parity_mode));
|
|
|
|
TEST_ASSERT_EQUAL(UART_PARITY_ODD, parity_mode);
|
|
|
|
memset(&tios_result, 0xFF, sizeof(struct termios));
|
|
|
|
}
|
|
|
|
|
|
|
|
{
|
|
|
|
uint32_t baudrate;
|
|
|
|
|
|
|
|
tios.c_cflag &= (~BOTHER);
|
|
|
|
tios.c_cflag |= CBAUD;
|
|
|
|
tios.c_ispeed = tios.c_ospeed = B38400;
|
|
|
|
TEST_ASSERT_EQUAL(0, tcsetattr(uart_fd, TCSANOW, &tios));
|
|
|
|
TEST_ASSERT_EQUAL(0, tcgetattr(uart_fd, &tios_result));
|
|
|
|
TEST_ASSERT_EQUAL(CBAUD, tios_result.c_cflag & CBAUD);
|
|
|
|
TEST_ASSERT_EQUAL(ESP_OK, uart_get_baudrate(UART_NUM_1, &baudrate));
|
2022-09-29 16:37:01 -04:00
|
|
|
TEST_ASSERT_INT32_WITHIN(2, 38400, baudrate);
|
2023-01-18 22:43:05 -05:00
|
|
|
if (clk_src_hz == 40000000) {
|
2022-09-29 16:37:01 -04:00
|
|
|
// Setting the speed to 38400 will set it actually to 38401
|
|
|
|
// Note: can't use TEST_ASSERT_INT32_WITHIN here because B38400 == 15
|
|
|
|
TEST_ASSERT_EQUAL(38401, tios_result.c_ispeed);
|
|
|
|
TEST_ASSERT_EQUAL(38401, tios_result.c_ospeed);
|
|
|
|
} else {
|
|
|
|
TEST_ASSERT_EQUAL(B38400, tios_result.c_ispeed);
|
|
|
|
TEST_ASSERT_EQUAL(B38400, tios_result.c_ospeed);
|
|
|
|
}
|
2018-08-14 07:39:30 -04:00
|
|
|
|
|
|
|
tios.c_cflag |= CBAUDEX;
|
|
|
|
tios.c_ispeed = tios.c_ospeed = B230400;
|
|
|
|
TEST_ASSERT_EQUAL(0, tcsetattr(uart_fd, TCSANOW, &tios));
|
|
|
|
TEST_ASSERT_EQUAL(0, tcgetattr(uart_fd, &tios_result));
|
|
|
|
TEST_ASSERT_EQUAL(BOTHER, tios_result.c_cflag & BOTHER);
|
|
|
|
TEST_ASSERT_EQUAL(ESP_OK, uart_get_baudrate(UART_NUM_1, &baudrate));
|
2022-09-29 16:37:01 -04:00
|
|
|
// Setting the speed to 230400 will set it actually to something else,
|
2023-01-18 22:43:05 -05:00
|
|
|
// depending on the default clock source
|
2022-09-29 16:37:01 -04:00
|
|
|
TEST_ASSERT_INT32_WITHIN(100, 230400, tios_result.c_ispeed);
|
|
|
|
TEST_ASSERT_INT32_WITHIN(100, 230400, tios_result.c_ospeed);
|
|
|
|
TEST_ASSERT_INT32_WITHIN(100, 230400, baudrate);
|
2018-08-14 07:39:30 -04:00
|
|
|
|
|
|
|
tios.c_cflag |= BOTHER;
|
2020-12-22 03:50:23 -05:00
|
|
|
tios.c_ispeed = tios.c_ospeed = 42321;
|
2018-08-14 07:39:30 -04:00
|
|
|
TEST_ASSERT_EQUAL(0, tcsetattr(uart_fd, TCSANOW, &tios));
|
|
|
|
TEST_ASSERT_EQUAL(0, tcgetattr(uart_fd, &tios_result));
|
|
|
|
TEST_ASSERT_EQUAL(BOTHER, tios_result.c_cflag & BOTHER);
|
|
|
|
TEST_ASSERT_EQUAL(ESP_OK, uart_get_baudrate(UART_NUM_1, &baudrate));
|
2022-09-29 16:37:01 -04:00
|
|
|
// Setting the speed to 230400 will set it actually to something else,
|
2023-01-18 22:43:05 -05:00
|
|
|
// depending on the default clock source
|
2022-09-29 16:37:01 -04:00
|
|
|
TEST_ASSERT_INT32_WITHIN(10, 42321, tios_result.c_ispeed);
|
|
|
|
TEST_ASSERT_INT32_WITHIN(10, 42321, tios_result.c_ospeed);
|
|
|
|
TEST_ASSERT_INT32_WITHIN(10, 42321, baudrate);
|
2018-08-14 07:39:30 -04:00
|
|
|
|
|
|
|
memset(&tios_result, 0xFF, sizeof(struct termios));
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_vfs_dev_uart_use_nonblocking(1);
|
|
|
|
close(uart_fd);
|
|
|
|
uart_driver_delete(UART_NUM_1);
|
|
|
|
}
|
2019-07-02 11:14:58 -04:00
|
|
|
#endif // CONFIG_VFS_SUPPORT_TERMIOS
|
2023-01-19 01:47:44 -05:00
|
|
|
#endif
|