2022-08-22 10:03:30 -04:00
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/*
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2024-04-15 00:12:52 -04:00
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* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
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2022-08-22 10:03:30 -04:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <sys/cdefs.h>
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#include "sdkconfig.h"
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#if CONFIG_ETM_ENABLE_DEBUG_LOG
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// The local log level must be defined before including esp_log.h
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// Set the maximum log level for this source file
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#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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#endif
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#include "freertos/FreeRTOS.h"
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#include "driver/gpio.h"
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#include "driver/gpio_etm.h"
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#include "esp_heap_caps.h"
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#include "esp_log.h"
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#include "esp_check.h"
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#include "soc/soc_caps.h"
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#include "hal/gpio_ll.h"
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#include "hal/gpio_etm_ll.h"
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#include "esp_private/etm_interface.h"
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#define ETM_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
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static const char *TAG = "gpio-etm";
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typedef struct gpio_etm_task_t gpio_etm_task_t;
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typedef struct gpio_etm_event_t gpio_etm_event_t;
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typedef struct gpio_etm_group_t {
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portMUX_TYPE spinlock;
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gpio_etm_dev_t *dev;
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2024-04-15 00:12:52 -04:00
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uint8_t tasks[GPIO_LL_ETM_TASK_CHANNELS_PER_GROUP]; // Array of the acquired action masks in each GPIO ETM task channel
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uint8_t events[GPIO_LL_ETM_EVENT_CHANNELS_PER_GROUP]; // Array of the acquired event masks in each GPIO ETM event channel
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uint8_t actions[SOC_GPIO_PIN_COUNT]; // Array of the masks of the added actions to each GPIO
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uint8_t edges[GPIO_LL_ETM_EVENT_CHANNELS_PER_GROUP]; // Array of the masks of the bound event edges in each GPIO ETM event channel
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2022-08-22 10:03:30 -04:00
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} gpio_etm_group_t;
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struct gpio_etm_event_t {
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esp_etm_event_t base;
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int chan_id;
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2024-04-15 00:12:52 -04:00
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gpio_etm_event_edge_t edge_id;
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2022-08-22 10:03:30 -04:00
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gpio_etm_group_t *group;
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};
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struct gpio_etm_task_t {
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esp_etm_task_t base;
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int chan_id;
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2024-04-15 00:12:52 -04:00
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gpio_etm_task_action_t action_id;
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2022-08-22 10:03:30 -04:00
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gpio_etm_group_t *group;
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size_t num_of_gpios; // record the number of GPIOs that are bound to the etm task
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};
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static gpio_etm_group_t s_gpio_etm_group = {
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.dev = &GPIO_ETM,
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.spinlock = portMUX_INITIALIZER_UNLOCKED,
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};
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2024-04-15 00:12:52 -04:00
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static esp_err_t gpio_etm_acquire_event_channel(uint8_t event_mask, int *chan_id)
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2022-08-22 10:03:30 -04:00
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{
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2024-04-15 00:12:52 -04:00
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assert(chan_id);
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2022-08-22 10:03:30 -04:00
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gpio_etm_group_t *group = &s_gpio_etm_group;
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2024-04-15 00:12:52 -04:00
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int free_chan_id = -1;
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// loop to search free event channel in the group
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2022-08-22 10:03:30 -04:00
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portENTER_CRITICAL(&group->spinlock);
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2024-04-15 00:12:52 -04:00
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for (int j = 0; j < GPIO_LL_ETM_EVENT_CHANNELS_PER_GROUP; j++) {
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2022-08-22 10:03:30 -04:00
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if (!group->events[j]) {
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free_chan_id = j;
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group->events[j] = event_mask;
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2022-08-22 10:03:30 -04:00
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break;
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}
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}
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portEXIT_CRITICAL(&group->spinlock);
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2024-04-15 00:12:52 -04:00
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ESP_RETURN_ON_FALSE(free_chan_id != -1, ESP_ERR_NOT_FOUND, TAG, "no free event channel");
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*chan_id = free_chan_id;
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2022-08-22 10:03:30 -04:00
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return ESP_OK;
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}
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2024-04-15 00:12:52 -04:00
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static esp_err_t gpio_etm_release_event_channel(int chan_id, uint8_t event_mask)
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2022-08-22 10:03:30 -04:00
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{
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gpio_etm_group_t *group = &s_gpio_etm_group;
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portENTER_CRITICAL(&group->spinlock);
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2024-04-15 00:12:52 -04:00
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group->events[chan_id] &= ~event_mask;
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2022-08-22 10:03:30 -04:00
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portEXIT_CRITICAL(&group->spinlock);
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return ESP_OK;
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}
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2024-04-15 00:12:52 -04:00
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static esp_err_t gpio_etm_acquire_task_channel(uint8_t task_mask, int *chan_id)
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2022-08-22 10:03:30 -04:00
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{
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2024-04-15 00:12:52 -04:00
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assert(chan_id);
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gpio_etm_group_t *group = &s_gpio_etm_group;
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2022-08-22 10:03:30 -04:00
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2024-04-15 00:12:52 -04:00
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int free_chan_id = -1;
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// loop to search free task channel in the group
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2022-08-22 10:03:30 -04:00
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portENTER_CRITICAL(&group->spinlock);
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2024-04-15 00:12:52 -04:00
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for (int j = 0; j < GPIO_LL_ETM_TASK_CHANNELS_PER_GROUP; j++) {
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if (!group->tasks[j]) {
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free_chan_id = j;
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group->tasks[j] = task_mask;
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break;
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}
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}
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2022-08-22 10:03:30 -04:00
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portEXIT_CRITICAL(&group->spinlock);
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2024-04-15 00:12:52 -04:00
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ESP_RETURN_ON_FALSE(free_chan_id != -1, ESP_ERR_NOT_FOUND, TAG, "no free task channel");
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*chan_id = free_chan_id;
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2022-08-22 10:03:30 -04:00
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return ESP_OK;
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}
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2024-04-15 00:12:52 -04:00
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static esp_err_t gpio_etm_release_task_channel(int chan_id, uint8_t task_mask)
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2022-08-22 10:03:30 -04:00
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{
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2024-04-15 00:12:52 -04:00
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gpio_etm_group_t *group = &s_gpio_etm_group;
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portENTER_CRITICAL(&group->spinlock);
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group->tasks[chan_id] &= ~task_mask;
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portEXIT_CRITICAL(&group->spinlock);
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2022-08-22 10:03:30 -04:00
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return ESP_OK;
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}
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static esp_err_t gpio_del_etm_event(esp_etm_event_t *event)
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{
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gpio_etm_event_t *gpio_event = __containerof(event, gpio_etm_event_t, base);
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gpio_etm_group_t *group = gpio_event->group;
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2024-04-15 00:12:52 -04:00
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// unbind it from the GPIO and check if the GPIO ETM event channel can be disabled
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portENTER_CRITICAL(&group->spinlock);
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group->edges[gpio_event->chan_id] &= ~(1 << gpio_event->edge_id);
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if (!group->edges[gpio_event->chan_id]) {
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gpio_ll_etm_enable_event_channel(group->dev, gpio_event->chan_id, false);
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}
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portEXIT_CRITICAL(&group->spinlock);
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gpio_etm_release_event_channel(gpio_event->chan_id, 1 << gpio_event->edge_id);
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free(gpio_event);
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2022-08-22 10:03:30 -04:00
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return ESP_OK;
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}
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static esp_err_t gpio_del_etm_task(esp_etm_task_t *task)
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{
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gpio_etm_task_t *gpio_task = __containerof(task, gpio_etm_task_t, base);
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// make sure user has called `gpio_etm_task_rm_gpio` to clean the etm task channel
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ESP_RETURN_ON_FALSE(gpio_task->num_of_gpios == 0, ESP_ERR_INVALID_STATE, TAG, "some GPIO till bounded to the etm task");
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2024-04-15 00:12:52 -04:00
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gpio_etm_release_task_channel(gpio_task->chan_id, 1 << gpio_task->action_id);
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free(gpio_task);
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2022-08-22 10:03:30 -04:00
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return ESP_OK;
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}
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2024-04-15 00:12:52 -04:00
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esp_err_t gpio_new_etm_event(const gpio_etm_event_config_t *config, esp_etm_event_handle_t *ret_event, ...)
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2022-08-22 10:03:30 -04:00
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{
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#if CONFIG_ETM_ENABLE_DEBUG_LOG
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esp_log_level_set(TAG, ESP_LOG_DEBUG);
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#endif
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esp_err_t ret = ESP_OK;
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2024-04-15 00:12:52 -04:00
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int chan_id = -1;
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uint8_t event_mask = 0;
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esp_etm_event_handle_t *ret_event_itor = ret_event;
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va_list args;
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ESP_RETURN_ON_FALSE(config && ret_event, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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for (int i = 0; i < GPIO_ETM_EVENT_EDGE_TYPES; i++) {
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if (config->edges[i]) {
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uint8_t msk = (1 << config->edges[i]);
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ESP_RETURN_ON_FALSE(!(msk & event_mask), ESP_ERR_INVALID_ARG, TAG, "no identical edge event allowed in one call");
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event_mask |= msk;
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}
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}
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ESP_RETURN_ON_FALSE(event_mask, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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uint32_t event_num = __builtin_popcount(event_mask);
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gpio_etm_event_t *events[event_num];
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2022-08-22 10:03:30 -04:00
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2024-04-15 00:12:52 -04:00
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for (int i = 0; i < event_num; i++) {
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events[i] = (gpio_etm_event_t *)heap_caps_calloc(1, sizeof(gpio_etm_event_t), ETM_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(events[i], ESP_ERR_NO_MEM, err, TAG, "no mem for event channel(s)");
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2022-08-22 10:03:30 -04:00
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}
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2024-04-15 00:12:52 -04:00
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// register the event channel to the group
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ESP_GOTO_ON_ERROR(gpio_etm_acquire_event_channel(event_mask, &chan_id), err, TAG, "register event channel to group failed");
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bool no_avail_ret_arg = false;
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va_start(args, ret_event);
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for (int i = 0, j = 0; i < event_num; i++, j++) {
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if (!ret_event_itor) {
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no_avail_ret_arg = true;
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break;
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}
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// assign to the ret_event handles in the configuration order
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gpio_etm_event_edge_t event_edge;
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do {
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event_edge = config->edges[j];
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} while (!event_edge && ++j);
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uint32_t event_id = 0;
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switch (event_edge) {
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case GPIO_ETM_EVENT_EDGE_ANY:
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event_id = GPIO_LL_ETM_EVENT_ID_ANY_EDGE(chan_id);
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break;
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case GPIO_ETM_EVENT_EDGE_POS:
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event_id = GPIO_LL_ETM_EVENT_ID_POS_EDGE(chan_id);
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break;
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case GPIO_ETM_EVENT_EDGE_NEG:
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event_id = GPIO_LL_ETM_EVENT_ID_NEG_EDGE(chan_id);
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break;
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default:
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va_end(args);
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ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "invalid edge");
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}
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gpio_etm_event_t *event = events[i];
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event->base.del = gpio_del_etm_event;
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event->base.event_id = event_id;
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event->base.trig_periph = ETM_TRIG_PERIPH_GPIO;
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event->group = &s_gpio_etm_group;
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event->chan_id = chan_id;
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event->edge_id = event_edge;
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ESP_LOGD(TAG, "new event @%p, event_id=%"PRIu32", chan_id=%d", event, event_id, chan_id);
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*ret_event_itor = &event->base;
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ret_event_itor = va_arg(args, esp_etm_event_handle_t *);
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}
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va_end(args);
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ESP_GOTO_ON_FALSE(!no_avail_ret_arg, ESP_ERR_INVALID_ARG, err, TAG, "mismatch number of events with number of pointers to store event handles");
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2022-08-22 10:03:30 -04:00
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return ESP_OK;
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err:
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2024-04-15 00:12:52 -04:00
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if (chan_id != -1) {
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gpio_etm_release_event_channel(chan_id, event_mask);
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}
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for (int i = 0; i < event_num; i++) {
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if (events[i]) {
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free(events[i]);
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}
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2022-08-22 10:03:30 -04:00
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}
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2024-04-15 00:12:52 -04:00
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ret_event_itor = ret_event;
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va_start(args, ret_event);
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while (ret_event_itor) {
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*ret_event_itor = NULL;
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ret_event_itor = va_arg(args, esp_etm_event_handle_t *);
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}
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va_end(args);
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2022-08-22 10:03:30 -04:00
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return ret;
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}
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2024-04-15 00:12:52 -04:00
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esp_err_t gpio_new_etm_task(const gpio_etm_task_config_t *config, esp_etm_task_handle_t *ret_task, ...)
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2022-08-22 10:03:30 -04:00
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{
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#if CONFIG_ETM_ENABLE_DEBUG_LOG
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esp_log_level_set(TAG, ESP_LOG_DEBUG);
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#endif
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esp_err_t ret = ESP_OK;
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2024-04-15 00:12:52 -04:00
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int chan_id = -1;
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uint8_t task_mask = 0;
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esp_etm_task_handle_t *ret_task_itor = ret_task;
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va_list args;
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ESP_RETURN_ON_FALSE(config && ret_task, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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for (int i = 0; i < GPIO_ETM_TASK_ACTION_TYPES; i++) {
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if (config->actions[i]) {
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uint8_t msk = (1 << config->actions[i]);
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ESP_RETURN_ON_FALSE(!(msk & task_mask), ESP_ERR_INVALID_ARG, TAG, "no identical action allowed in one call");
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task_mask |= msk;
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}
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}
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ESP_RETURN_ON_FALSE(task_mask, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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uint32_t task_num = __builtin_popcount(task_mask);
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gpio_etm_task_t *tasks[task_num];
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2022-08-22 10:03:30 -04:00
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2024-04-15 00:12:52 -04:00
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for (int i = 0; i < task_num; i++) {
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tasks[i] = (gpio_etm_task_t *)heap_caps_calloc(1, sizeof(gpio_etm_task_t), ETM_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(tasks[i], ESP_ERR_NO_MEM, err, TAG, "no mem for task channel(s)");
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2022-08-22 10:03:30 -04:00
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}
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2024-04-15 00:12:52 -04:00
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// register the task channel to the group
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ESP_GOTO_ON_ERROR(gpio_etm_acquire_task_channel(task_mask, &chan_id), err, TAG, "register task channel to group failed");
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bool no_avail_ret_arg = false;
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va_start(args, ret_task);
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for (int i = 0, j = 0; i < task_num; i++, j++) {
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if (!ret_task_itor) {
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no_avail_ret_arg = true;
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break;
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}
|
|
|
|
// assign to the ret_task handles in the configuration order
|
|
|
|
gpio_etm_task_action_t action;
|
|
|
|
do {
|
|
|
|
action = config->actions[i];
|
|
|
|
} while (!action && ++j);
|
|
|
|
uint32_t task_id = 0;
|
|
|
|
switch (action) {
|
|
|
|
case GPIO_ETM_TASK_ACTION_SET:
|
|
|
|
task_id = GPIO_LL_ETM_TASK_ID_SET(chan_id);
|
|
|
|
break;
|
|
|
|
case GPIO_ETM_TASK_ACTION_CLR:
|
|
|
|
task_id = GPIO_LL_ETM_TASK_ID_CLR(chan_id);
|
|
|
|
break;
|
|
|
|
case GPIO_ETM_TASK_ACTION_TOG:
|
|
|
|
task_id = GPIO_LL_ETM_TASK_ID_TOG(chan_id);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
va_end(args);
|
|
|
|
ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "invalid action");
|
|
|
|
}
|
|
|
|
|
|
|
|
gpio_etm_task_t *task = tasks[i];
|
|
|
|
task->base.del = gpio_del_etm_task;
|
|
|
|
task->base.task_id = task_id;
|
|
|
|
task->base.trig_periph = ETM_TRIG_PERIPH_GPIO;
|
|
|
|
task->group = &s_gpio_etm_group;
|
|
|
|
task->chan_id = chan_id;
|
|
|
|
task->action_id = action;
|
|
|
|
ESP_LOGD(TAG, "new task @%p, task_id=%"PRIu32", gpio_etm_task_chan_id=%d", task, task_id, chan_id);
|
|
|
|
*ret_task_itor = &task->base;
|
|
|
|
ret_task_itor = va_arg(args, esp_etm_task_handle_t *);
|
|
|
|
}
|
|
|
|
va_end(args);
|
|
|
|
ESP_GOTO_ON_FALSE(!no_avail_ret_arg, ESP_ERR_INVALID_ARG, err, TAG, "mismatch number of tasks with number of pointers to store task handles");
|
2022-08-22 10:03:30 -04:00
|
|
|
return ESP_OK;
|
|
|
|
|
|
|
|
err:
|
2024-04-15 00:12:52 -04:00
|
|
|
if (chan_id != -1) {
|
|
|
|
gpio_etm_release_task_channel(chan_id, task_mask);
|
2022-08-22 10:03:30 -04:00
|
|
|
}
|
2024-04-15 00:12:52 -04:00
|
|
|
for (int i = 0; i < task_num; i++) {
|
|
|
|
if (tasks[i]) {
|
|
|
|
free(tasks[i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
ret_task_itor = ret_task;
|
|
|
|
va_start(args, ret_task);
|
|
|
|
while (ret_task_itor) {
|
|
|
|
*ret_task_itor = NULL;
|
|
|
|
ret_task_itor = va_arg(args, esp_etm_task_handle_t *);
|
|
|
|
}
|
|
|
|
va_end(args);
|
2022-08-22 10:03:30 -04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t gpio_etm_event_bind_gpio(esp_etm_event_handle_t event, int gpio_num)
|
|
|
|
{
|
|
|
|
ESP_RETURN_ON_FALSE(event, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
|
|
ESP_RETURN_ON_FALSE(event->trig_periph == ETM_TRIG_PERIPH_GPIO, ESP_ERR_INVALID_ARG, TAG, "not a gpio etm event");
|
|
|
|
ESP_RETURN_ON_FALSE(GPIO_IS_VALID_GPIO(gpio_num), ESP_ERR_INVALID_ARG, TAG, "gpio is not input capable");
|
|
|
|
gpio_etm_event_t *gpio_event = __containerof(event, gpio_etm_event_t, base);
|
|
|
|
gpio_etm_group_t *group = gpio_event->group;
|
2024-04-15 00:12:52 -04:00
|
|
|
|
|
|
|
bool allowed = true;
|
|
|
|
portENTER_CRITICAL(&group->spinlock);
|
|
|
|
// check if the GPIO ETM event channel where the new event belongs to has previously been bound to another GPIO
|
|
|
|
// one GPIO ETM event channel can only be bound to one GPIO
|
|
|
|
if (group->edges[gpio_event->chan_id]) {
|
|
|
|
if (gpio_ll_etm_event_channel_get_gpio(group->dev, gpio_event->chan_id) != gpio_num) {
|
|
|
|
allowed = false;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// set the GPIO number
|
|
|
|
gpio_ll_etm_event_channel_set_gpio(group->dev, gpio_event->chan_id, gpio_num);
|
|
|
|
// enable GPIO ETM event channel
|
|
|
|
gpio_ll_etm_enable_event_channel(group->dev, gpio_event->chan_id, true);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (allowed) {
|
|
|
|
group->edges[gpio_event->chan_id] |= (1 << gpio_event->edge_id);
|
|
|
|
}
|
|
|
|
portEXIT_CRITICAL(&group->spinlock);
|
|
|
|
ESP_RETURN_ON_FALSE(allowed, ESP_ERR_INVALID_ARG, TAG, "the GPIO ETM event channel where the event belongs to has already been bound to another GPIO");
|
2022-08-22 10:03:30 -04:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t gpio_etm_task_add_gpio(esp_etm_task_handle_t task, int gpio_num)
|
|
|
|
{
|
|
|
|
ESP_RETURN_ON_FALSE(task, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
|
|
ESP_RETURN_ON_FALSE(task->trig_periph == ETM_TRIG_PERIPH_GPIO, ESP_ERR_INVALID_ARG, TAG, "not a gpio etm task");
|
|
|
|
ESP_RETURN_ON_FALSE(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), ESP_ERR_INVALID_ARG, TAG, "gpio is not output capable");
|
|
|
|
gpio_etm_task_t *gpio_task = __containerof(task, gpio_etm_task_t, base);
|
|
|
|
gpio_etm_group_t *group = gpio_task->group;
|
2024-04-15 00:12:52 -04:00
|
|
|
|
|
|
|
bool allowed = true;
|
2022-08-22 10:03:30 -04:00
|
|
|
// use spinlock as this function may be called with different task object in different threads
|
|
|
|
// and the gpio_num might reside in the same register
|
|
|
|
portENTER_CRITICAL(&group->spinlock);
|
2024-04-15 00:12:52 -04:00
|
|
|
// check if the new task is compatible with the tasks that has previously been added to the GPIO
|
|
|
|
// the tasks have to be from the same GPIO ETM task channel
|
|
|
|
if (group->actions[gpio_num]) {
|
|
|
|
if (gpio_ll_etm_gpio_get_task_channel(group->dev, gpio_num) != gpio_task->chan_id) {
|
|
|
|
allowed = false;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// first action added to the GPIO
|
2022-08-22 10:03:30 -04:00
|
|
|
gpio_ll_etm_gpio_set_task_channel(group->dev, gpio_num, gpio_task->chan_id);
|
|
|
|
gpio_ll_etm_enable_task_gpio(group->dev, gpio_num, true);
|
2024-04-15 00:12:52 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
if (allowed) {
|
|
|
|
group->actions[gpio_num] |= (1 << gpio_task->action_id);
|
2022-08-22 10:03:30 -04:00
|
|
|
}
|
|
|
|
portEXIT_CRITICAL(&group->spinlock);
|
2024-04-15 00:12:52 -04:00
|
|
|
ESP_RETURN_ON_FALSE(allowed, ESP_ERR_INVALID_ARG, TAG, "the task does not belong to the GPIO ETM task channel that the GPIO has already binded to");
|
2022-08-22 10:03:30 -04:00
|
|
|
gpio_task->num_of_gpios++;
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t gpio_etm_task_rm_gpio(esp_etm_task_handle_t task, int gpio_num)
|
|
|
|
{
|
|
|
|
ESP_RETURN_ON_FALSE(task, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
|
|
ESP_RETURN_ON_FALSE(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), ESP_ERR_INVALID_ARG, TAG, "gpio is not output capable");
|
|
|
|
gpio_etm_task_t *gpio_task = __containerof(task, gpio_etm_task_t, base);
|
|
|
|
gpio_etm_group_t *group = gpio_task->group;
|
2024-04-15 00:12:52 -04:00
|
|
|
|
|
|
|
bool allowed = true;
|
2022-08-22 10:03:30 -04:00
|
|
|
// use spinlock as this function may be called with different task object in different threads
|
|
|
|
// and the gpio_num might reside in the same register
|
|
|
|
portENTER_CRITICAL(&group->spinlock);
|
2024-04-15 00:12:52 -04:00
|
|
|
if ((group->actions[gpio_num] & (1 << gpio_task->action_id)) &&
|
|
|
|
gpio_ll_etm_is_task_gpio_enabled(group->dev, gpio_num) &&
|
2022-08-22 10:03:30 -04:00
|
|
|
(gpio_ll_etm_gpio_get_task_channel(group->dev, gpio_num) == gpio_task->chan_id)) {
|
2024-04-15 00:12:52 -04:00
|
|
|
group->actions[gpio_num] &= ~(1 << gpio_task->action_id);
|
|
|
|
if (!group->actions[gpio_num]) {
|
|
|
|
// all actions removed from the GPIO
|
|
|
|
gpio_ll_etm_enable_task_gpio(group->dev, gpio_num, false);
|
|
|
|
}
|
2022-08-22 10:03:30 -04:00
|
|
|
} else {
|
2024-04-15 00:12:52 -04:00
|
|
|
allowed = false;
|
2022-08-22 10:03:30 -04:00
|
|
|
}
|
|
|
|
portEXIT_CRITICAL(&group->spinlock);
|
2024-04-15 00:12:52 -04:00
|
|
|
ESP_RETURN_ON_FALSE(allowed, ESP_ERR_INVALID_ARG, TAG, "the task was not added to the GPIO");
|
2022-08-22 10:03:30 -04:00
|
|
|
gpio_task->num_of_gpios--;
|
|
|
|
return ESP_OK;
|
|
|
|
}
|