2017-05-08 08:03:04 -04:00
|
|
|
// Copyright 2010-2017 Espressif Systems (Shanghai) PTE LTD
|
|
|
|
//
|
|
|
|
// Licensed under the Apache License, Version 2.0 (the "License");
|
|
|
|
// you may not use this file except in compliance with the License.
|
|
|
|
// You may obtain a copy of the License at
|
|
|
|
|
|
|
|
// http://www.apache.org/licenses/LICENSE-2.0
|
|
|
|
//
|
|
|
|
// Unless required by applicable law or agreed to in writing, software
|
|
|
|
// distributed under the License is distributed on an "AS IS" BASIS,
|
|
|
|
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
|
|
// See the License for the specific language governing permissions and
|
|
|
|
// limitations under the License.
|
|
|
|
|
2017-08-17 00:16:21 -04:00
|
|
|
#include <sdkconfig.h>
|
|
|
|
|
2017-05-08 08:03:04 -04:00
|
|
|
#ifndef _ESP_DPORT_ACCESS_H_
|
|
|
|
#define _ESP_DPORT_ACCESS_H_
|
|
|
|
|
2017-05-31 05:20:17 -04:00
|
|
|
#ifdef __cplusplus
|
|
|
|
extern "C" {
|
|
|
|
#endif
|
|
|
|
|
2017-05-08 08:03:04 -04:00
|
|
|
void esp_dport_access_stall_other_cpu_start(void);
|
|
|
|
void esp_dport_access_stall_other_cpu_end(void);
|
|
|
|
void esp_dport_access_int_init(void);
|
2017-08-24 05:48:40 -04:00
|
|
|
void esp_dport_access_int_pause(void);
|
|
|
|
void esp_dport_access_int_resume(void);
|
2018-03-22 08:39:59 -04:00
|
|
|
void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words);
|
2018-05-21 06:10:03 -04:00
|
|
|
uint32_t esp_dport_access_reg_read(uint32_t reg);
|
|
|
|
uint32_t esp_dport_access_sequence_reg_read(uint32_t reg);
|
2017-09-11 00:31:16 -04:00
|
|
|
//This routine does not stop the dport routines in any way that is recoverable. Please
|
|
|
|
//only call in case of panic().
|
|
|
|
void esp_dport_access_int_abort(void);
|
|
|
|
|
2019-07-28 23:35:00 -04:00
|
|
|
#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM)
|
2017-05-13 07:55:11 -04:00
|
|
|
#define DPORT_STALL_OTHER_CPU_START()
|
|
|
|
#define DPORT_STALL_OTHER_CPU_END()
|
2018-03-22 08:39:59 -04:00
|
|
|
#define DPORT_INTERRUPT_DISABLE()
|
|
|
|
#define DPORT_INTERRUPT_RESTORE()
|
2017-05-13 07:55:11 -04:00
|
|
|
#else
|
|
|
|
#define DPORT_STALL_OTHER_CPU_START() esp_dport_access_stall_other_cpu_start()
|
|
|
|
#define DPORT_STALL_OTHER_CPU_END() esp_dport_access_stall_other_cpu_end()
|
2018-03-22 08:39:59 -04:00
|
|
|
#define DPORT_INTERRUPT_DISABLE() unsigned int intLvl = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL)
|
|
|
|
#define DPORT_INTERRUPT_RESTORE() XTOS_RESTORE_JUST_INTLEVEL(intLvl)
|
2017-05-13 07:55:11 -04:00
|
|
|
#endif
|
|
|
|
|
2017-05-31 05:20:17 -04:00
|
|
|
#ifdef __cplusplus
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2017-05-08 08:03:04 -04:00
|
|
|
#endif /* _ESP_DPORT_ACCESS_H_ */
|