esp-idf/components/esp32c2/Kconfig

menu "ESP32C2-Specific"
    visible if IDF_TARGET_ESP32C2

    choice ESP32C2_DEFAULT_CPU_FREQ_MHZ
        prompt "CPU frequency"
        default ESP32C2_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
        default ESP32C2_DEFAULT_CPU_FREQ_120 if !IDF_ENV_FPGA
        help
            CPU frequency to be set on application startup.

        config ESP32C2_DEFAULT_CPU_FREQ_40
            bool "40 MHz"
            depends on IDF_ENV_FPGA
        config ESP32C2_DEFAULT_CPU_FREQ_80
            bool "80 MHz"
        config ESP32C2_DEFAULT_CPU_FREQ_120
            bool "120 MHz"
    endchoice

    config ESP32C2_DEFAULT_CPU_FREQ_MHZ
        int
        default 40 if ESP32C2_DEFAULT_CPU_FREQ_40
        default 80 if ESP32C2_DEFAULT_CPU_FREQ_80
        default 120 if ESP32C2_DEFAULT_CPU_FREQ_120

    menu "Cache config"

        choice ESP32C2_MMU_PAGE_SIZE
            # TODO: IDF-3821
            prompt "Cache page size"
            default ESP32C2_MMU_PAGE_SIZE_64KB
            help
                Cache page size to be set on application startup

            config ESP32C2_MMU_PAGE_SIZE_16KB
                bool "16KB"
            config ESP32C2_MMU_PAGE_SIZE_32KB
                bool "32KB"
            config ESP32C2_MMU_PAGE_SIZE_64KB
                bool "64KB"
        endchoice

        config ESP32C2_INSTRUCTION_CACHE_WRAP
            bool
            prompt "Instruction cache wrap"
            help
                If enabled, instruction cache will use wrap mode to read spi flash.
                The wrap length is fixed to 32B


        config ESP32C2_MMU_PAGE_MODE
            int
            default 0 if ESP32C2_MMU_PAGE_SIZE_16KB
            default 1 if ESP32C2_MMU_PAGE_SIZE_32KB
            default 2 if ESP32C2_MMU_PAGE_SIZE_64KB

    endmenu


    config ESP32C2_DEBUG_STUBS_ENABLE
        bool "OpenOCD debug stubs"
        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
        depends on !ESP32C2_TRAX
        help
            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
            e.g. GCOV data dump.

    choice ESP32C2_TIME_SYSCALL
        prompt "Timers used for gettimeofday function"
        default ESP32C2_TIME_SYSCALL_USE_RTC_SYSTIMER
        help
            This setting defines which hardware timers are used to
            implement 'gettimeofday' and 'time' functions in C library.

            - If both high-resolution (systimer) and RTC timers are used, timekeeping will
              continue in deep sleep. Time will be reported at 1 microsecond
              resolution. This is the default, and the recommended option.
            - If only high-resolution timer (systimer) is used, gettimeofday will
              provide time at microsecond resolution.
              Time will not be preserved when going into deep sleep mode.
            - If only RTC timer is used, timekeeping will continue in
              deep sleep, but time will be measured at 6.(6) microsecond
              resolution. Also the gettimeofday function itself may take
              longer to run.
            - If no timers are used, gettimeofday and time functions
              return -1 and set errno to ENOSYS.
            - When RTC is used for timekeeping, two RTC_STORE registers are
              used to keep time in deep sleep mode.

        config ESP32C2_TIME_SYSCALL_USE_RTC_SYSTIMER
            bool "RTC and high-resolution timer"
            select ESP_TIME_FUNCS_USE_RTC_TIMER
            select ESP_TIME_FUNCS_USE_ESP_TIMER
        config ESP32C2_TIME_SYSCALL_USE_RTC
            bool "RTC"
            select ESP_TIME_FUNCS_USE_RTC_TIMER
        config ESP32C2_TIME_SYSCALL_USE_SYSTIMER
            bool "High-resolution timer"
            select ESP_TIME_FUNCS_USE_ESP_TIMER
        config ESP32C2_TIME_SYSCALL_USE_NONE
            bool "None"
            select ESP_TIME_FUNCS_USE_NONE
    endchoice

    choice ESP32C2_RTC_CLK_SRC
        prompt "RTC clock source"
        default ESP32C2_RTC_CLK_SRC_INT_RC
        help
            Choose which clock is used as RTC clock source.

        config ESP32C2_RTC_CLK_SRC_INT_RC
            bool "Internal 150kHz RC oscillator"
        config ESP32C2_RTC_CLK_SRC_EXT_OSC
            bool "External 32kHz oscillator at 32K_XP pin"
        config ESP32C2_RTC_CLK_SRC_INT_8MD256
            bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
    endchoice

    config ESP32C2_RTC_CLK_CAL_CYCLES
        int "Number of cycles for RTC_SLOW_CLK calibration"
        default 3000 if ESP32C2_RTC_CLK_SRC_EXT_CRYS || ESP32C2_RTC_CLK_SRC_EXT_OSC || ESP32C2_RTC_CLK_SRC_INT_8MD256
        default 1024 if ESP32C2_RTC_CLK_SRC_INT_RC
        range 0 27000 if ESP32C2_RTC_CLK_SRC_EXT_CRYS || ESP32C2_RTC_CLK_SRC_EXT_OSC || ESP32C2_RTC_CLK_SRC_INT_8MD256
        range 0 32766 if ESP32C2_RTC_CLK_SRC_INT_RC
        help
            When the startup code initializes RTC_SLOW_CLK, it can perform
            calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
            frequency. This option sets the number of RTC_SLOW_CLK cycles measured
            by the calibration routine. Higher numbers increase calibration
            precision, which may be important for applications which spend a lot of
            time in deep sleep. Lower numbers reduce startup time.

            When this option is set to 0, clock calibration will not be performed at
            startup, and approximate clock frequencies will be assumed:

            - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
            - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
              In case more value will help improve the definition of the launch of the crystal.
              If the crystal could not start, it will be switched to internal RC.

    config ESP32C2_LIGHTSLEEP_GPIO_RESET_WORKAROUND # IDF-3904
        bool "light sleep GPIO reset workaround"
        default y
        select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
        help
            ESP32C2 will reset at wake-up if GPIO is received a small electrostatic pulse during
            light sleep, with specific condition

            - GPIO needs to be configured as input-mode only
            - The pin receives a small electrostatic pulse, and reset occurs when the pulse
              voltage is higher than 6 V

            For GPIO set to input mode only, it is not a good practice to leave it open/floating,
            The hardware design needs to controlled it with determined supply or ground voltage
            is necessary.

            This option provides a software workaround for this issue. Configure to isolate all
            GPIO pins in sleep state.

endmenu  # ESP32C2-Specific