2021-10-13 05:10:57 -04:00
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/*
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2024-01-04 04:24:03 -05:00
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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2021-10-13 05:10:57 -04:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2020-07-09 08:58:13 -04:00
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#include <stddef.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include "sdkconfig.h"
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#include "esp_heap_caps.h"
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#include "esp_heap_caps_init.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "freertos/semphr.h"
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#include "freertos/portmacro.h"
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#include "esp_types.h"
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2022-01-12 01:53:47 -05:00
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#include "esp_mac.h"
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#include "esp_random.h"
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2020-07-09 08:58:13 -04:00
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#include "esp_task.h"
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#include "esp_attr.h"
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#include "esp_phy_init.h"
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#include "esp_bt.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "esp_pm.h"
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#include "esp_ipc.h"
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2021-10-25 05:13:46 -04:00
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#include "esp_private/periph_ctrl.h"
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2021-11-18 22:42:01 -05:00
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#include "esp_private/esp_clk.h"
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2022-09-21 05:19:27 -04:00
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#include "soc/soc_caps.h"
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2020-07-09 08:58:13 -04:00
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#include "soc/rtc.h"
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#include "soc/rtc_cntl_reg.h"
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#include "soc/soc_memory_layout.h"
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2023-08-09 05:41:27 -04:00
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#include "private/esp_coexist_internal.h"
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2020-07-09 08:58:13 -04:00
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#include "esp_timer.h"
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2021-01-28 09:28:04 -05:00
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#include "esp_sleep.h"
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2023-02-21 01:47:41 -05:00
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#include "esp_rom_sys.h"
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2022-12-19 07:29:52 -05:00
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#include "esp_private/phy.h"
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2023-02-21 01:47:41 -05:00
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#if CONFIG_IDF_TARGET_ESP32C3
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#include "riscv/interrupt.h"
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#include "esp32c3/rom/rom_layout.h"
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#else //CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/rom_layout.h"
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#endif
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2020-07-09 08:58:13 -04:00
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#if CONFIG_BT_ENABLED
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/* Macro definition
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************************************************************************
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*/
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2023-02-21 01:47:41 -05:00
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#define BT_LOG_TAG "BLE_INIT"
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2020-07-09 08:58:13 -04:00
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#define BTDM_INIT_PERIOD (5000) /* ms */
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/* Low Power Clock Selection */
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#define BTDM_LPCLK_SEL_XTAL (0)
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#define BTDM_LPCLK_SEL_XTAL32K (1)
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#define BTDM_LPCLK_SEL_RTC_SLOW (2)
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#define BTDM_LPCLK_SEL_8M (3)
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2020-12-24 22:53:08 -05:00
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// wakeup request sources
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enum {
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BTDM_ASYNC_WAKEUP_SRC_VHCI = 0,
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2024-03-19 04:46:37 -04:00
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BTDM_ASYNC_WAKEUP_REQ_COEX,
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2020-12-24 22:53:08 -05:00
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BTDM_ASYNC_WAKEUP_SRC_DISA,
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2020-12-26 10:44:23 -05:00
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BTDM_ASYNC_WAKEUP_SRC_TMR,
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2020-12-24 22:53:08 -05:00
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BTDM_ASYNC_WAKEUP_SRC_MAX,
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};
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// low power control struct
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typedef union {
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struct {
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uint32_t enable : 1; // whether low power mode is required
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2023-12-22 04:25:00 -05:00
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uint32_t lpclk_sel : 3; // low power clock source
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2020-12-24 22:53:08 -05:00
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uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) force-power-down is required during sleep
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uint32_t wakeup_timer_required : 1; // whether system timer is needed
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uint32_t no_light_sleep : 1; // do not allow system to enter light sleep after bluetooth is enabled
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2021-10-13 03:13:21 -04:00
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uint32_t main_xtal_pu : 1; // power up main XTAL
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2023-12-22 04:25:00 -05:00
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uint32_t reserved : 24; // reserved
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2020-12-24 22:53:08 -05:00
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};
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uint32_t val;
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} btdm_lpcntl_t;
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// low power control status
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typedef union {
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struct {
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uint32_t pm_lock_released : 1; // whether power management lock is released
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uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) is powered down
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2020-12-26 10:44:23 -05:00
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uint32_t phy_enabled : 1; // whether phy is switched on
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uint32_t wakeup_timer_started : 1; // whether wakeup timer is started
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uint32_t reserved : 28; // reserved
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2020-12-24 22:53:08 -05:00
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};
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uint32_t val;
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} btdm_lpstat_t;
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2020-07-09 08:58:13 -04:00
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/* Sleep and wakeup interval control */
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#define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
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#define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
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#define BT_DEBUG(...)
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#define BT_API_CALL_CHECK(info, api_call, ret) \
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do{\
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esp_err_t __err = (api_call);\
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if ((ret) != __err) {\
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BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
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return __err;\
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}\
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} while(0)
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#define OSI_FUNCS_TIME_BLOCKING 0xffffffff
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2024-03-19 04:46:37 -04:00
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#define OSI_VERSION 0x00010008
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2020-07-09 08:58:13 -04:00
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#define OSI_MAGIC_VALUE 0xFADEBEAD
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/* Types definition
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************************************************************************
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*/
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2020-12-21 08:02:24 -05:00
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/* vendor dependent signals to be posted to controller task */
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typedef enum {
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BTDM_VND_OL_SIG_WAKEUP_TMR = 0,
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BTDM_VND_OL_SIG_NUM,
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} btdm_vnd_ol_sig_t;
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/* prototype of function to handle vendor dependent signals */
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typedef void (* btdm_vnd_ol_task_func_t)(void *param);
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2020-07-09 08:58:13 -04:00
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/* VHCI function interface */
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typedef struct vhci_host_callback {
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void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
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int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
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} vhci_host_callback_t;
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typedef struct {
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2023-02-21 01:47:41 -05:00
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void *handle;
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} btdm_queue_item_t;
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2020-07-09 08:58:13 -04:00
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typedef void (* osi_intr_handler)(void);
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/* OSI function */
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struct osi_funcs_t {
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uint32_t _magic;
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uint32_t _version;
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void (*_interrupt_set)(int cpu_no, int intr_source, int interrupt_no, int interrpt_prio);
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void (*_interrupt_clear)(int interrupt_source, int interrupt_no);
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void (*_interrupt_handler_set)(int interrupt_no, intr_handler_t fn, void *arg);
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void (*_interrupt_disable)(void);
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void (*_interrupt_restore)(void);
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void (*_task_yield)(void);
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void (*_task_yield_from_isr)(void);
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void *(*_semphr_create)(uint32_t max, uint32_t init);
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void (*_semphr_delete)(void *semphr);
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int (*_semphr_take_from_isr)(void *semphr, void *hptw);
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int (*_semphr_give_from_isr)(void *semphr, void *hptw);
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int (*_semphr_take)(void *semphr, uint32_t block_time_ms);
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int (*_semphr_give)(void *semphr);
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void *(*_mutex_create)(void);
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void (*_mutex_delete)(void *mutex);
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int (*_mutex_lock)(void *mutex);
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int (*_mutex_unlock)(void *mutex);
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void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
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void (* _queue_delete)(void *queue);
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int (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
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int (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
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int (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
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int (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
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int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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void (* _task_delete)(void *task_handle);
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bool (* _is_in_isr)(void);
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int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
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void *(* _malloc)(size_t size);
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void *(* _malloc_internal)(size_t size);
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void (* _free)(void *p);
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int (* _read_efuse_mac)(uint8_t mac[6]);
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void (* _srand)(unsigned int seed);
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int (* _rand)(void);
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uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
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uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
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bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
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void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
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void (* _btdm_sleep_enter_phase2)(void);
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void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
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void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
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void (* _btdm_sleep_exit_phase3)(void); /* called from task */
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void (* _coex_wifi_sleep_set)(bool sleep);
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int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
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2024-03-19 04:46:37 -04:00
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int (* _coex_schm_register_btdm_callback)(void *callback);
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2020-07-09 08:58:13 -04:00
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void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
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void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
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2024-03-19 04:46:37 -04:00
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uint32_t (* _coex_schm_interval_get)(void);
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uint8_t (* _coex_schm_curr_period_get)(void);
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void *(* _coex_schm_curr_phase_get)(void);
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2020-07-09 08:58:13 -04:00
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void (* _interrupt_on)(int intr_num);
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void (* _interrupt_off)(int intr_num);
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void (* _esp_hw_power_down)(void);
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void (* _esp_hw_power_up)(void);
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void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem);
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2023-07-07 07:50:24 -04:00
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void (* _ets_delay_us)(uint32_t us);
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void (* _btdm_rom_table_ready)(void);
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2024-03-19 04:46:37 -04:00
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bool (* _coex_bt_wakeup_request)(void);
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void (* _coex_bt_wakeup_request_end)(void);
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2020-07-09 08:58:13 -04:00
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};
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/* External functions or values
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************************************************************************
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*/
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/* not for user call, so don't put to include file */
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/* OSI */
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extern int btdm_osi_funcs_register(void *osi_funcs);
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/* Initialise and De-initialise */
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extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
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extern void btdm_controller_deinit(void);
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extern int btdm_controller_enable(esp_bt_mode_t mode);
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extern void btdm_controller_disable(void);
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extern uint8_t btdm_controller_get_mode(void);
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extern const char *btdm_controller_get_compile_version(void);
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extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
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/* Sleep */
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extern void btdm_controller_enable_sleep(bool enable);
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extern uint8_t btdm_controller_get_sleep_mode(void);
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extern bool btdm_power_state_active(void);
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extern void btdm_wakeup_request(void);
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2020-12-24 22:53:08 -05:00
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extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
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2020-12-21 08:02:24 -05:00
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/* vendor dependent tasks to be posted and handled by controller task*/
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extern int btdm_vnd_offload_task_register(btdm_vnd_ol_sig_t sig, btdm_vnd_ol_task_func_t func);
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extern int btdm_vnd_offload_task_deregister(btdm_vnd_ol_sig_t sig);
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2023-01-14 03:53:18 -05:00
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extern int r_btdm_vnd_offload_post_from_isr(btdm_vnd_ol_sig_t sig, void *param, bool need_yield);
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extern int r_btdm_vnd_offload_post(btdm_vnd_ol_sig_t sig, void *param);
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2020-12-21 08:02:24 -05:00
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2020-07-09 08:58:13 -04:00
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/* Low Power Clock */
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extern bool btdm_lpclk_select_src(uint32_t sel);
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extern bool btdm_lpclk_set_div(uint32_t div);
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extern int btdm_hci_tl_io_event_post(int event);
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/* VHCI */
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extern bool API_vhci_host_check_send_available(void);
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extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
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extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
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/* TX power */
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extern int ble_txpwr_set(int power_type, int power_level);
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extern int ble_txpwr_get(int power_type);
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extern uint16_t l2c_ble_link_get_tx_buf_num(void);
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2022-06-19 23:46:40 -04:00
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extern void coex_pti_v2(void);
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2020-07-09 08:58:13 -04:00
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extern bool btdm_deep_sleep_mem_init(void);
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extern void btdm_deep_sleep_mem_deinit(void);
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extern void btdm_ble_power_down_dma_copy(bool copy);
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extern uint8_t btdm_sleep_clock_sync(void);
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2023-09-08 03:44:00 -04:00
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extern void sdk_config_extend_set_pll_track(bool enable);
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2020-07-09 08:58:13 -04:00
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2021-01-28 09:28:04 -05:00
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#if CONFIG_MAC_BB_PD
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2020-07-09 08:58:13 -04:00
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extern void esp_mac_bb_power_down(void);
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extern void esp_mac_bb_power_up(void);
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extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
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#endif
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2023-07-07 07:50:24 -04:00
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extern void btdm_cca_feature_enable(void);
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2020-07-09 08:58:13 -04:00
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extern uint32_t _bt_bss_start;
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extern uint32_t _bt_bss_end;
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extern uint32_t _btdm_bss_start;
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extern uint32_t _btdm_bss_end;
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2022-10-20 09:35:30 -04:00
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extern uint32_t _nimble_bss_start;
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extern uint32_t _nimble_bss_end;
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2020-07-09 08:58:13 -04:00
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extern uint32_t _bt_data_start;
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extern uint32_t _bt_data_end;
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extern uint32_t _btdm_data_start;
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extern uint32_t _btdm_data_end;
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2022-10-20 09:35:30 -04:00
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extern uint32_t _nimble_data_start;
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extern uint32_t _nimble_data_end;
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2020-07-09 08:58:13 -04:00
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/* Local Function Declare
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*********************************************************************
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*/
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static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio);
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static void interrupt_clear_wrapper(int intr_source, int intr_num);
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static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg);
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2022-01-19 21:25:43 -05:00
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static void interrupt_disable(void);
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static void interrupt_restore(void);
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static void task_yield_from_isr(void);
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2020-07-09 08:58:13 -04:00
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static void *semphr_create_wrapper(uint32_t max, uint32_t init);
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static void semphr_delete_wrapper(void *semphr);
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2022-01-19 21:25:43 -05:00
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static int semphr_take_from_isr_wrapper(void *semphr, void *hptw);
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static int semphr_give_from_isr_wrapper(void *semphr, void *hptw);
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2020-07-09 08:58:13 -04:00
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static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
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static int semphr_give_wrapper(void *semphr);
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static void *mutex_create_wrapper(void);
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static void mutex_delete_wrapper(void *mutex);
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static int mutex_lock_wrapper(void *mutex);
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static int mutex_unlock_wrapper(void *mutex);
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static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
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static void queue_delete_wrapper(void *queue);
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static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
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2022-01-19 21:25:43 -05:00
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static int queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
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2020-07-09 08:58:13 -04:00
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static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
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2022-01-19 21:25:43 -05:00
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static int queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
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2020-07-09 08:58:13 -04:00
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static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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static void task_delete_wrapper(void *task_handle);
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2022-01-19 21:25:43 -05:00
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static bool is_in_isr_wrapper(void);
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2020-07-09 08:58:13 -04:00
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static void *malloc_internal_wrapper(size_t size);
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2022-01-19 21:25:43 -05:00
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static int read_mac_wrapper(uint8_t mac[6]);
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static void srand_wrapper(unsigned int seed);
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static int rand_wrapper(void);
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static uint32_t btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
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static uint32_t btdm_hus_2_lpcycles(uint32_t hus);
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static bool btdm_sleep_check_duration(int32_t *slot_cnt);
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2020-07-09 08:58:13 -04:00
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static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
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static void btdm_sleep_enter_phase2_wrapper(void);
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static void btdm_sleep_exit_phase3_wrapper(void);
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static void coex_wifi_sleep_set_hook(bool sleep);
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2024-03-19 04:46:37 -04:00
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static int coex_schm_register_btdm_callback_wrapper(void *callback);
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2020-07-09 08:58:13 -04:00
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static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
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static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
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2024-03-19 04:46:37 -04:00
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static uint32_t coex_schm_interval_get_wrapper(void);
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static uint8_t coex_schm_curr_period_get_wrapper(void);
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static void * coex_schm_curr_phase_get_wrapper(void);
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2020-07-09 08:58:13 -04:00
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static void interrupt_on_wrapper(int intr_num);
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static void interrupt_off_wrapper(int intr_num);
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static void btdm_hw_mac_power_up_wrapper(void);
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static void btdm_hw_mac_power_down_wrapper(void);
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static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
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2023-07-07 07:50:24 -04:00
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static void btdm_funcs_table_ready_wrapper(void);
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2024-03-19 04:46:37 -04:00
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static bool coex_bt_wakeup_request(void);
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static void coex_bt_wakeup_request_end(void);
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2020-12-26 10:44:23 -05:00
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static void btdm_slp_tmr_callback(void *arg);
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2022-10-20 09:35:30 -04:00
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static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end);
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2022-12-07 22:54:26 -05:00
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static void bt_controller_deinit_internal(void);
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2020-07-09 08:58:13 -04:00
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/* Local variable definition
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***************************************************************************
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*/
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/* OSI funcs */
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static const struct osi_funcs_t osi_funcs_ro = {
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._magic = OSI_MAGIC_VALUE,
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._version = OSI_VERSION,
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._interrupt_set = interrupt_set_wrapper,
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._interrupt_clear = interrupt_clear_wrapper,
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._interrupt_handler_set = interrupt_handler_set_wrapper,
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._interrupt_disable = interrupt_disable,
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._interrupt_restore = interrupt_restore,
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._task_yield = vPortYield,
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._task_yield_from_isr = task_yield_from_isr,
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._semphr_create = semphr_create_wrapper,
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._semphr_delete = semphr_delete_wrapper,
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._semphr_take_from_isr = semphr_take_from_isr_wrapper,
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._semphr_give_from_isr = semphr_give_from_isr_wrapper,
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._semphr_take = semphr_take_wrapper,
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._semphr_give = semphr_give_wrapper,
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._mutex_create = mutex_create_wrapper,
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._mutex_delete = mutex_delete_wrapper,
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._mutex_lock = mutex_lock_wrapper,
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._mutex_unlock = mutex_unlock_wrapper,
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._queue_create = queue_create_wrapper,
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._queue_delete = queue_delete_wrapper,
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._queue_send = queue_send_wrapper,
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._queue_send_from_isr = queue_send_from_isr_wrapper,
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._queue_recv = queue_recv_wrapper,
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._queue_recv_from_isr = queue_recv_from_isr_wrapper,
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._task_create = task_create_wrapper,
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._task_delete = task_delete_wrapper,
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._is_in_isr = is_in_isr_wrapper,
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._cause_sw_intr_to_core = NULL,
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._malloc = malloc,
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._malloc_internal = malloc_internal_wrapper,
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._free = free,
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._read_efuse_mac = read_mac_wrapper,
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._srand = srand_wrapper,
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._rand = rand_wrapper,
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._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
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._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
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._btdm_sleep_check_duration = btdm_sleep_check_duration,
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._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
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._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
|
2020-12-24 22:53:08 -05:00
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._btdm_sleep_exit_phase1 = NULL,
|
2020-07-09 08:58:13 -04:00
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._btdm_sleep_exit_phase2 = NULL,
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._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
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._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
|
2023-02-21 03:30:54 -05:00
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._coex_core_ble_conn_dyn_prio_get = NULL,
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2024-03-19 04:46:37 -04:00
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._coex_schm_register_btdm_callback = coex_schm_register_btdm_callback_wrapper,
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2020-07-09 08:58:13 -04:00
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._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
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._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
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2024-03-19 04:46:37 -04:00
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._coex_schm_interval_get = coex_schm_interval_get_wrapper,
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._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper,
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._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
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2020-07-09 08:58:13 -04:00
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._interrupt_on = interrupt_on_wrapper,
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._interrupt_off = interrupt_off_wrapper,
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._esp_hw_power_down = btdm_hw_mac_power_down_wrapper,
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._esp_hw_power_up = btdm_hw_mac_power_up_wrapper,
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._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper,
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2023-07-07 07:50:24 -04:00
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._ets_delay_us = esp_rom_delay_us,
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._btdm_rom_table_ready = btdm_funcs_table_ready_wrapper,
|
2024-03-19 04:46:37 -04:00
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._coex_bt_wakeup_request = coex_bt_wakeup_request,
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._coex_bt_wakeup_request_end = coex_bt_wakeup_request_end,
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2020-07-09 08:58:13 -04:00
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};
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static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
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/* Static variable declare */
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static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
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static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
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2020-12-24 22:53:08 -05:00
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// low power control struct
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static DRAM_ATTR btdm_lpcntl_t s_lp_cntl;
|
2020-12-26 10:44:23 -05:00
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// low power status struct
|
2020-12-24 22:53:08 -05:00
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static DRAM_ATTR btdm_lpstat_t s_lp_stat;
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2020-12-26 10:44:23 -05:00
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// measured average low power clock period in micro seconds
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static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
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// number of fractional bit for btdm_lpcycle_us
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static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0;
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// semaphore used for blocking VHCI API to wait for controller to wake up
|
2020-12-24 22:53:08 -05:00
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static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
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// wakeup timer
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2023-12-22 04:25:00 -05:00
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static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr = NULL;
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2020-07-09 08:58:13 -04:00
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2020-12-26 10:44:23 -05:00
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#ifdef CONFIG_PM_ENABLE
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static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
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// pm_lock to prevent light sleep due to incompatibility currently
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static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
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#endif
|
2020-07-09 08:58:13 -04:00
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|
2021-01-28 09:28:04 -05:00
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void IRAM_ATTR btdm_hw_mac_power_down_wrapper(void)
|
2020-07-09 08:58:13 -04:00
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{
|
2021-01-28 09:28:04 -05:00
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#if CONFIG_MAC_BB_PD
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2022-09-21 05:19:27 -04:00
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#if SOC_PM_SUPPORT_BT_PD
|
2021-09-14 05:47:09 -04:00
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// Bluetooth module power down
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2020-12-24 22:53:08 -05:00
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SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
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SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
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2023-02-21 01:47:41 -05:00
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#endif
|
2020-07-09 08:58:13 -04:00
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esp_mac_bb_power_down();
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#endif
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}
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|
2021-01-28 09:28:04 -05:00
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void IRAM_ATTR btdm_hw_mac_power_up_wrapper(void)
|
2020-07-09 08:58:13 -04:00
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{
|
2021-01-28 09:28:04 -05:00
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#if CONFIG_MAC_BB_PD
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2022-09-21 05:19:27 -04:00
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#if SOC_PM_SUPPORT_BT_PD
|
2021-09-14 05:47:09 -04:00
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// Bluetooth module power up
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2020-12-24 22:53:08 -05:00
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CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
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CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
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2023-02-21 01:47:41 -05:00
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#endif
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2020-07-09 08:58:13 -04:00
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esp_mac_bb_power_up();
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#endif
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}
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2023-02-21 01:47:41 -05:00
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void IRAM_ATTR btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem)
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{
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#if CONFIG_MAC_BB_PD
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ets_backup_dma_copy(reg, mem_addr, num, to_mem);
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#endif
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}
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2021-09-14 05:47:09 -04:00
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static inline void esp_bt_power_domain_on(void)
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{
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// Bluetooth module power up
|
2022-09-21 05:19:27 -04:00
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#if SOC_PM_SUPPORT_BT_PD
|
2021-09-14 05:47:09 -04:00
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CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
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CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
|
2023-02-21 01:47:41 -05:00
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#endif
|
2021-09-14 05:47:09 -04:00
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esp_wifi_bt_power_domain_on();
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}
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static inline void esp_bt_power_domain_off(void)
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{
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// Bluetooth module power down
|
2022-09-21 05:19:27 -04:00
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#if SOC_PM_SUPPORT_BT_PD
|
2021-09-14 05:47:09 -04:00
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SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
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SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
|
2020-07-09 08:58:13 -04:00
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#endif
|
2023-02-21 01:47:41 -05:00
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esp_wifi_bt_power_domain_off();
|
2020-07-09 08:58:13 -04:00
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}
|
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static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio)
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{
|
2023-02-21 01:47:41 -05:00
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|
esp_rom_route_intr_matrix(cpu_no, intr_source, intr_num);
|
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|
|
#if __riscv
|
2023-12-28 21:59:55 -05:00
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|
esprv_int_set_priority(intr_num, intr_prio);
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|
esprv_int_set_type(intr_num, 0);
|
2023-02-21 01:47:41 -05:00
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|
#endif
|
2020-07-09 08:58:13 -04:00
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}
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|
static void interrupt_clear_wrapper(int intr_source, int intr_num)
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|
{
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}
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|
static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg)
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|
{
|
2023-02-21 01:47:41 -05:00
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|
esp_cpu_intr_set_handler(n, fn, arg);
|
2020-07-09 08:58:13 -04:00
|
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}
|
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|
static void interrupt_on_wrapper(int intr_num)
|
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|
{
|
2023-02-21 01:47:41 -05:00
|
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|
esp_cpu_intr_enable(1 << intr_num);
|
2020-07-09 08:58:13 -04:00
|
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|
}
|
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|
static void interrupt_off_wrapper(int intr_num)
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|
{
|
2023-02-21 01:47:41 -05:00
|
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|
esp_cpu_intr_disable(1<<intr_num);
|
2020-07-09 08:58:13 -04:00
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}
|
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|
static void IRAM_ATTR interrupt_disable(void)
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|
{
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|
|
if (xPortInIsrContext()) {
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|
|
portENTER_CRITICAL_ISR(&global_int_mux);
|
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|
} else {
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|
|
portENTER_CRITICAL(&global_int_mux);
|
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|
}
|
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|
}
|
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|
|
static void IRAM_ATTR interrupt_restore(void)
|
|
|
|
{
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|
|
|
if (xPortInIsrContext()) {
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|
|
portEXIT_CRITICAL_ISR(&global_int_mux);
|
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|
|
} else {
|
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|
|
portEXIT_CRITICAL(&global_int_mux);
|
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|
}
|
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|
}
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|
|
static void IRAM_ATTR task_yield_from_isr(void)
|
|
|
|
{
|
|
|
|
portYIELD_FROM_ISR();
|
|
|
|
}
|
|
|
|
|
|
|
|
static void *semphr_create_wrapper(uint32_t max, uint32_t init)
|
|
|
|
{
|
2023-02-21 01:47:41 -05:00
|
|
|
btdm_queue_item_t *semphr = heap_caps_calloc(1, sizeof(btdm_queue_item_t), MALLOC_CAP_8BIT|MALLOC_CAP_INTERNAL);
|
|
|
|
assert(semphr);
|
|
|
|
|
2023-04-13 02:49:42 -04:00
|
|
|
/* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
|
2023-02-21 01:47:41 -05:00
|
|
|
semphr->handle = (void *)xSemaphoreCreateCounting(max, init);
|
|
|
|
assert(semphr->handle);
|
2023-04-13 02:49:42 -04:00
|
|
|
|
2023-02-21 01:47:41 -05:00
|
|
|
return semphr;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void semphr_delete_wrapper(void *semphr)
|
|
|
|
{
|
2023-02-21 01:47:41 -05:00
|
|
|
if (semphr == NULL) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
btdm_queue_item_t *semphr_item = (btdm_queue_item_t *)semphr;
|
|
|
|
|
|
|
|
if (semphr_item->handle) {
|
|
|
|
vSemaphoreDelete(semphr_item->handle);
|
|
|
|
}
|
|
|
|
|
|
|
|
free(semphr);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
|
|
|
|
{
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xSemaphoreTakeFromISR(((btdm_queue_item_t *)semphr)->handle, hptw);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
|
|
|
|
{
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xSemaphoreGiveFromISR(((btdm_queue_item_t *)semphr)->handle, hptw);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
|
|
|
|
{
|
|
|
|
if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xSemaphoreTake(((btdm_queue_item_t *)semphr)->handle, portMAX_DELAY);
|
2020-07-09 08:58:13 -04:00
|
|
|
} else {
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xSemaphoreTake(((btdm_queue_item_t *)semphr)->handle, block_time_ms / portTICK_PERIOD_MS);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int semphr_give_wrapper(void *semphr)
|
|
|
|
{
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xSemaphoreGive(((btdm_queue_item_t *)semphr)->handle);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void *mutex_create_wrapper(void)
|
|
|
|
{
|
|
|
|
return (void *)xSemaphoreCreateMutex();
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mutex_delete_wrapper(void *mutex)
|
|
|
|
{
|
|
|
|
vSemaphoreDelete(mutex);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mutex_lock_wrapper(void *mutex)
|
|
|
|
{
|
|
|
|
return (int)xSemaphoreTake(mutex, portMAX_DELAY);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mutex_unlock_wrapper(void *mutex)
|
|
|
|
{
|
|
|
|
return (int)xSemaphoreGive(mutex);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
|
|
|
|
{
|
2023-02-21 01:47:41 -05:00
|
|
|
btdm_queue_item_t *queue = NULL;
|
|
|
|
|
|
|
|
queue = (btdm_queue_item_t*)heap_caps_malloc(sizeof(btdm_queue_item_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
|
|
|
|
assert(queue);
|
|
|
|
|
2023-04-13 02:49:42 -04:00
|
|
|
/* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
|
2023-02-21 01:47:41 -05:00
|
|
|
queue->handle = xQueueCreate( queue_len, item_size);
|
|
|
|
assert(queue->handle);
|
|
|
|
|
|
|
|
return queue;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void queue_delete_wrapper(void *queue)
|
|
|
|
{
|
2023-02-21 01:47:41 -05:00
|
|
|
btdm_queue_item_t *queue_item = (btdm_queue_item_t *)queue;
|
|
|
|
if (queue_item) {
|
|
|
|
if(queue_item->handle){
|
|
|
|
vQueueDelete(queue_item->handle);
|
|
|
|
}
|
|
|
|
free(queue_item);
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
|
|
|
|
{
|
|
|
|
if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xQueueSend(((btdm_queue_item_t*)queue)->handle, item, portMAX_DELAY);
|
2020-07-09 08:58:13 -04:00
|
|
|
} else {
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xQueueSend(((btdm_queue_item_t*)queue)->handle, item, block_time_ms / portTICK_PERIOD_MS);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
|
|
|
|
{
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xQueueSendFromISR(((btdm_queue_item_t*)queue)->handle, item, hptw);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
|
|
|
|
{
|
|
|
|
if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xQueueReceive(((btdm_queue_item_t*)queue)->handle, item, portMAX_DELAY);
|
2020-07-09 08:58:13 -04:00
|
|
|
} else {
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xQueueReceive(((btdm_queue_item_t*)queue)->handle, item, block_time_ms / portTICK_PERIOD_MS);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
|
|
|
|
{
|
2023-02-21 01:47:41 -05:00
|
|
|
return (int)xQueueReceiveFromISR(((btdm_queue_item_t*)queue)->handle, item, hptw);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
|
|
|
|
{
|
2023-12-13 17:32:53 -05:00
|
|
|
return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < CONFIG_FREERTOS_NUMBER_OF_CORES ? core_id : tskNO_AFFINITY));
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void task_delete_wrapper(void *task_handle)
|
|
|
|
{
|
|
|
|
vTaskDelete(task_handle);
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool IRAM_ATTR is_in_isr_wrapper(void)
|
|
|
|
{
|
|
|
|
return (bool)xPortInIsrContext();
|
|
|
|
}
|
|
|
|
|
|
|
|
static void *malloc_internal_wrapper(size_t size)
|
|
|
|
{
|
2023-12-05 07:30:22 -05:00
|
|
|
void *p = heap_caps_malloc(size, MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
|
2023-02-21 01:47:41 -05:00
|
|
|
if(p == NULL) {
|
|
|
|
ESP_LOGE(BT_LOG_TAG, "Malloc failed");
|
|
|
|
}
|
|
|
|
return p;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
|
|
|
|
{
|
|
|
|
int ret = esp_read_mac(mac, ESP_MAC_BT);
|
2023-06-08 14:56:11 -04:00
|
|
|
ESP_LOGI(BT_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x",
|
2020-07-09 08:58:13 -04:00
|
|
|
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void IRAM_ATTR srand_wrapper(unsigned int seed)
|
|
|
|
{
|
|
|
|
/* empty function */
|
|
|
|
}
|
|
|
|
|
|
|
|
static int IRAM_ATTR rand_wrapper(void)
|
|
|
|
{
|
|
|
|
return (int)esp_random();
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
|
|
|
|
{
|
|
|
|
uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
|
|
|
|
uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
|
|
|
|
local_error_corr += res;
|
|
|
|
res = (local_error_corr >> btdm_lpcycle_us_frac);
|
|
|
|
local_error_corr -= (res << btdm_lpcycle_us_frac);
|
|
|
|
if (error_corr) {
|
|
|
|
*error_corr = (uint32_t) local_error_corr;
|
|
|
|
}
|
|
|
|
return (uint32_t)res;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* @brief Converts a duration in half us into a number of low power clock cycles.
|
|
|
|
*/
|
|
|
|
static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
|
|
|
|
{
|
|
|
|
// The number of sleep duration(us) should not lead to overflow. Thrs: 100s
|
|
|
|
// Compute the sleep duration in us to low power clock cycles, with calibration result applied
|
|
|
|
// clock measurement is conducted
|
|
|
|
uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
|
|
|
|
cycles >>= 1;
|
|
|
|
|
|
|
|
return (uint32_t)cycles;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
|
|
|
|
{
|
|
|
|
if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
/* wake up in advance considering the delay in enabling PHY/RF */
|
|
|
|
*half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
|
|
|
|
{
|
2020-12-24 22:53:08 -05:00
|
|
|
if (s_lp_cntl.wakeup_timer_required == 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
|
2020-07-09 08:58:13 -04:00
|
|
|
|
|
|
|
#define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
|
2024-01-28 22:29:01 -05:00
|
|
|
#define BTDM_RTC_SLOW_CLK_RC_DRIFT_PERCENT 7
|
2020-07-09 08:58:13 -04:00
|
|
|
assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
|
|
|
|
// allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
|
|
|
|
// and set the timer in advance
|
|
|
|
uint32_t uncertainty = (us_to_sleep >> 11);
|
2024-01-11 01:39:25 -05:00
|
|
|
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
|
|
|
if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
|
2024-01-28 22:29:01 -05:00
|
|
|
uncertainty = us_to_sleep * BTDM_RTC_SLOW_CLK_RC_DRIFT_PERCENT / 100;
|
2024-01-11 01:39:25 -05:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
|
|
|
|
uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
|
|
|
|
}
|
|
|
|
|
2020-12-26 10:44:23 -05:00
|
|
|
assert (s_lp_stat.wakeup_timer_started == 0);
|
2024-01-11 01:39:25 -05:00
|
|
|
// start a timer to wake up and acquire the pm_lock before modem_sleep awakes
|
2020-12-26 10:44:23 -05:00
|
|
|
if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) == ESP_OK) {
|
|
|
|
s_lp_stat.wakeup_timer_started = 1;
|
|
|
|
} else {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGE(BT_LOG_TAG, "timer start failed");
|
2020-12-26 10:44:23 -05:00
|
|
|
assert(0);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void btdm_sleep_enter_phase2_wrapper(void)
|
|
|
|
{
|
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
2020-12-26 10:44:23 -05:00
|
|
|
if (s_lp_stat.phy_enabled) {
|
2023-09-07 03:30:48 -04:00
|
|
|
esp_phy_disable(PHY_MODEM_BT);
|
2020-12-26 10:44:23 -05:00
|
|
|
s_lp_stat.phy_enabled = 0;
|
|
|
|
} else {
|
|
|
|
assert(0);
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2024-01-11 01:39:25 -05:00
|
|
|
if (s_lp_stat.pm_lock_released == 0) {
|
2020-12-24 22:53:08 -05:00
|
|
|
esp_pm_lock_release(s_pm_lock);
|
|
|
|
s_lp_stat.pm_lock_released = 1;
|
|
|
|
}
|
2024-01-11 01:39:25 -05:00
|
|
|
#endif
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void btdm_sleep_exit_phase3_wrapper(void)
|
|
|
|
{
|
2021-01-28 09:28:04 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
// If BT wakeup before esp timer coming due to timer task have no chance to run.
|
|
|
|
// Then we will not run into `btdm_sleep_exit_phase0` and acquire PM lock,
|
|
|
|
// Do it again here to fix this issue.
|
|
|
|
if (s_lp_stat.pm_lock_released) {
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
s_lp_stat.pm_lock_released = 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
2020-12-26 10:44:23 -05:00
|
|
|
if (s_lp_stat.phy_enabled == 0) {
|
2023-09-07 03:30:48 -04:00
|
|
|
esp_phy_enable(PHY_MODEM_BT);
|
2020-12-26 10:44:23 -05:00
|
|
|
s_lp_stat.phy_enabled = 1;
|
2020-12-24 22:53:08 -05:00
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
2021-01-28 09:28:04 -05:00
|
|
|
|
|
|
|
// If BT wakeup before esp timer coming due to timer task have no chance to run.
|
|
|
|
// Then we will not run into `btdm_sleep_exit_phase0` and stop esp timer,
|
|
|
|
// Do it again here to fix this issue.
|
|
|
|
if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
|
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
|
|
|
s_lp_stat.wakeup_timer_started = 0;
|
|
|
|
}
|
2021-06-23 20:11:44 -04:00
|
|
|
|
|
|
|
// wait for the sleep state to change
|
|
|
|
// the procedure duration is at micro-second level or less
|
|
|
|
while (btdm_sleep_clock_sync()) {
|
|
|
|
;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
2020-12-21 08:02:24 -05:00
|
|
|
static void IRAM_ATTR btdm_sleep_exit_phase0(void *param)
|
2020-07-09 08:58:13 -04:00
|
|
|
{
|
2020-12-24 22:53:08 -05:00
|
|
|
assert(s_lp_cntl.enable == 1);
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2020-12-24 22:53:08 -05:00
|
|
|
if (s_lp_stat.pm_lock_released) {
|
2020-07-09 08:58:13 -04:00
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
2020-12-24 22:53:08 -05:00
|
|
|
s_lp_stat.pm_lock_released = 0;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2021-03-09 00:49:59 -05:00
|
|
|
int event = (int) param;
|
|
|
|
if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
|
|
|
|
btdm_wakeup_request();
|
|
|
|
}
|
2020-12-24 22:53:08 -05:00
|
|
|
|
2020-12-26 10:44:23 -05:00
|
|
|
if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
|
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
|
|
|
s_lp_stat.wakeup_timer_started = 0;
|
|
|
|
}
|
2021-03-09 00:49:59 -05:00
|
|
|
|
2020-12-24 22:53:08 -05:00
|
|
|
if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
|
|
|
|
semphr_give_wrapper(s_wakeup_req_sem);
|
|
|
|
}
|
2020-12-21 08:02:24 -05:00
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
2020-12-21 08:02:24 -05:00
|
|
|
static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
|
|
|
|
{
|
2021-01-28 09:28:04 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2023-01-14 03:53:18 -05:00
|
|
|
r_btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)BTDM_ASYNC_WAKEUP_SRC_TMR);
|
2020-12-26 10:44:23 -05:00
|
|
|
#endif
|
2020-12-24 22:53:08 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static bool async_wakeup_request(int event)
|
|
|
|
{
|
|
|
|
if (s_lp_cntl.enable == 0) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool do_wakeup_request = false;
|
|
|
|
switch (event) {
|
|
|
|
case BTDM_ASYNC_WAKEUP_SRC_VHCI:
|
|
|
|
case BTDM_ASYNC_WAKEUP_SRC_DISA:
|
|
|
|
btdm_in_wakeup_requesting_set(true);
|
|
|
|
if (!btdm_power_state_active()) {
|
2023-01-14 03:53:18 -05:00
|
|
|
r_btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)event);
|
2020-12-24 22:53:08 -05:00
|
|
|
do_wakeup_request = true;
|
|
|
|
semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
|
|
|
|
}
|
|
|
|
break;
|
2024-03-19 04:46:37 -04:00
|
|
|
case BTDM_ASYNC_WAKEUP_REQ_COEX:
|
|
|
|
if (!btdm_power_state_active()) {
|
|
|
|
do_wakeup_request = true;
|
|
|
|
#if CONFIG_PM_ENABLE
|
|
|
|
if (s_lp_stat.pm_lock_released) {
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
s_lp_stat.pm_lock_released = 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
btdm_wakeup_request();
|
|
|
|
|
|
|
|
if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
|
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
|
|
|
s_lp_stat.wakeup_timer_started = 0;
|
|
|
|
}
|
|
|
|
}
|
2020-12-24 22:53:08 -05:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return do_wakeup_request;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void async_wakeup_request_end(int event)
|
|
|
|
{
|
|
|
|
if (s_lp_cntl.enable == 0) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool allow_to_sleep;
|
|
|
|
switch (event) {
|
|
|
|
case BTDM_ASYNC_WAKEUP_SRC_VHCI:
|
|
|
|
case BTDM_ASYNC_WAKEUP_SRC_DISA:
|
|
|
|
allow_to_sleep = true;
|
|
|
|
break;
|
2024-03-19 04:46:37 -04:00
|
|
|
case BTDM_ASYNC_WAKEUP_REQ_COEX:
|
|
|
|
allow_to_sleep = false;
|
|
|
|
break;
|
2020-12-24 22:53:08 -05:00
|
|
|
default:
|
|
|
|
allow_to_sleep = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (allow_to_sleep) {
|
|
|
|
btdm_in_wakeup_requesting_set(false);
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
2023-07-07 07:50:24 -04:00
|
|
|
static void btdm_funcs_table_ready_wrapper(void)
|
|
|
|
{
|
|
|
|
#if BT_BLE_CCA_MODE == 2
|
|
|
|
btdm_cca_feature_enable();
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2024-03-19 04:46:37 -04:00
|
|
|
bool bt_async_wakeup_request(void)
|
2020-07-09 08:58:13 -04:00
|
|
|
{
|
2024-03-19 04:46:37 -04:00
|
|
|
return async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_VHCI);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
2024-03-19 04:46:37 -04:00
|
|
|
void bt_wakeup_request_end(void)
|
2020-07-09 08:58:13 -04:00
|
|
|
{
|
2024-03-19 04:46:37 -04:00
|
|
|
async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_VHCI);
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool coex_bt_wakeup_request(void)
|
|
|
|
{
|
|
|
|
return async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_COEX);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void coex_bt_wakeup_request_end(void)
|
|
|
|
{
|
|
|
|
async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_COEX);
|
|
|
|
return;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
bool esp_vhci_host_check_send_available(void)
|
|
|
|
{
|
2020-12-24 22:53:08 -05:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return false;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
return API_vhci_host_check_send_available();
|
|
|
|
}
|
|
|
|
|
|
|
|
void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
|
|
|
|
{
|
2020-12-24 22:53:08 -05:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
2020-12-24 22:53:08 -05:00
|
|
|
async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_VHCI);
|
2020-07-09 08:58:13 -04:00
|
|
|
|
|
|
|
API_vhci_host_send_packet(data, len);
|
|
|
|
|
2020-12-24 22:53:08 -05:00
|
|
|
async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_VHCI);
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
|
|
|
|
{
|
2020-12-24 22:53:08 -05:00
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void btdm_controller_mem_init(void)
|
|
|
|
{
|
|
|
|
extern void btdm_controller_rom_data_init(void );
|
|
|
|
btdm_controller_rom_data_init();
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
2022-10-20 09:35:30 -04:00
|
|
|
intptr_t mem_start=(intptr_t) NULL, mem_end=(intptr_t) NULL;
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mode & ESP_BT_MODE_BLE) {
|
|
|
|
/* if the addresses of rom btdm .data and .bss are consecutive,
|
|
|
|
they are registered in the system heap as a piece of memory
|
|
|
|
*/
|
|
|
|
if(ets_rom_layout_p->data_end_btdm == ets_rom_layout_p->bss_start_btdm) {
|
|
|
|
mem_start = (intptr_t)ets_rom_layout_p->data_start_btdm;
|
|
|
|
mem_end = (intptr_t)ets_rom_layout_p->bss_end_btdm;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release rom btdm [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
mem_start = (intptr_t)ets_rom_layout_p->bss_start_btdm;
|
|
|
|
mem_end = (intptr_t)ets_rom_layout_p->bss_end_btdm;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release rom btdm BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
|
|
|
|
mem_start = (intptr_t)ets_rom_layout_p->data_start_btdm;
|
|
|
|
mem_end = (intptr_t)ets_rom_layout_p->data_end_btdm;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release rom btdm Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* if the addresses of rom interface btdm .data and .bss are consecutive,
|
|
|
|
they are registered in the system heap as a piece of memory
|
|
|
|
*/
|
|
|
|
if(ets_rom_layout_p->data_end_interface_btdm == ets_rom_layout_p->bss_start_interface_btdm) {
|
|
|
|
mem_start = (intptr_t)ets_rom_layout_p->data_start_interface_btdm;
|
|
|
|
mem_end = (intptr_t)ets_rom_layout_p->bss_end_interface_btdm;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
mem_start = (intptr_t)ets_rom_layout_p->data_start_interface_btdm;
|
|
|
|
mem_end = (intptr_t)ets_rom_layout_p->data_end_interface_btdm;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
|
|
|
|
mem_start = (intptr_t)ets_rom_layout_p->bss_start_interface_btdm;
|
|
|
|
mem_end = (intptr_t)ets_rom_layout_p->bss_end_interface_btdm;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
2022-10-20 09:35:30 -04:00
|
|
|
int ret;
|
|
|
|
intptr_t mem_start, mem_end;
|
|
|
|
|
|
|
|
ret = esp_bt_controller_mem_release(mode);
|
|
|
|
if (ret != ESP_OK) {
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mode & ESP_BT_MODE_BLE) {
|
|
|
|
/* if the addresses of btdm .bss and bt .bss are consecutive,
|
|
|
|
they are registered in the system heap as a piece of memory
|
|
|
|
*/
|
|
|
|
if(_bt_bss_end == _btdm_bss_start) {
|
|
|
|
mem_start = (intptr_t)&_bt_bss_start;
|
|
|
|
mem_end = (intptr_t)&_btdm_bss_end;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
mem_start = (intptr_t)&_bt_bss_start;
|
|
|
|
mem_end = (intptr_t)&_bt_bss_end;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
|
|
|
|
mem_start = (intptr_t)&_btdm_bss_start;
|
|
|
|
mem_end = (intptr_t)&_btdm_bss_end;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release BTDM BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* if the addresses of btdm .data and bt .data are consecutive,
|
|
|
|
they are registered in the system heap as a piece of memory
|
|
|
|
*/
|
|
|
|
if(_bt_data_end == _btdm_data_start) {
|
|
|
|
mem_start = (intptr_t)&_bt_data_start;
|
|
|
|
mem_end = (intptr_t)&_btdm_data_end;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
mem_start = (intptr_t)&_bt_data_start;
|
|
|
|
mem_end = (intptr_t)&_bt_data_end;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
|
|
|
|
mem_start = (intptr_t)&_btdm_data_start;
|
|
|
|
mem_end = (intptr_t)&_btdm_data_end;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release BTDM Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
mem_start = (intptr_t)&_nimble_bss_start;
|
|
|
|
mem_end = (intptr_t)&_nimble_bss_end;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
mem_start = (intptr_t)&_nimble_data_start;
|
|
|
|
mem_end = (intptr_t)&_nimble_data_end;
|
|
|
|
if (mem_start != mem_end) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGD(BT_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
|
2022-10-20 09:35:30 -04:00
|
|
|
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
|
|
|
|
}
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
|
|
|
|
{
|
|
|
|
int ret = heap_caps_add_region(start, end);
|
|
|
|
/* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
|
|
|
|
* is too small to fit a heap. This cannot be termed as a fatal error and hence
|
|
|
|
* we replace it by ESP_OK
|
|
|
|
*/
|
2023-02-21 01:47:41 -05:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (ret == ESP_ERR_INVALID_SIZE) {
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2021-11-15 04:04:42 -05:00
|
|
|
#if CONFIG_MAC_BB_PD
|
2021-01-28 09:28:04 -05:00
|
|
|
static void IRAM_ATTR btdm_mac_bb_power_down_cb(void)
|
2020-07-09 08:58:13 -04:00
|
|
|
{
|
2021-01-28 09:28:04 -05:00
|
|
|
if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd == 0) {
|
|
|
|
btdm_ble_power_down_dma_copy(true);
|
|
|
|
s_lp_stat.mac_bb_pd = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void IRAM_ATTR btdm_mac_bb_power_up_cb(void)
|
|
|
|
{
|
2020-12-24 22:53:08 -05:00
|
|
|
if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd) {
|
2021-01-28 09:28:04 -05:00
|
|
|
btdm_ble_power_down_dma_copy(false);
|
2020-12-24 22:53:08 -05:00
|
|
|
s_lp_stat.mac_bb_pd = 0;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
}
|
2021-01-28 09:28:04 -05:00
|
|
|
#endif
|
2020-07-09 08:58:13 -04:00
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
// init low-power control resources
|
|
|
|
static esp_err_t btdm_low_power_mode_init(esp_bt_controller_config_t *cfg)
|
2020-07-09 08:58:13 -04:00
|
|
|
{
|
2023-12-22 04:25:00 -05:00
|
|
|
esp_err_t err = ESP_OK;
|
2020-12-24 22:53:08 -05:00
|
|
|
|
|
|
|
do {
|
|
|
|
// set default values for global states or resources
|
|
|
|
s_lp_stat.val = 0;
|
|
|
|
s_lp_cntl.val = 0;
|
2021-10-13 03:13:21 -04:00
|
|
|
s_lp_cntl.main_xtal_pu = 0;
|
2020-12-24 22:53:08 -05:00
|
|
|
s_wakeup_req_sem = NULL;
|
|
|
|
s_btdm_slp_tmr = NULL;
|
|
|
|
|
|
|
|
// configure and initialize resources
|
|
|
|
s_lp_cntl.enable = (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) ? 1 : 0;
|
2023-12-22 04:25:00 -05:00
|
|
|
s_lp_cntl.lpclk_sel = (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) ? cfg->sleep_clock : ESP_BT_SLEEP_CLOCK_MAIN_XTAL;
|
2021-10-13 03:13:21 -04:00
|
|
|
s_lp_cntl.no_light_sleep = 0;
|
2020-12-24 22:53:08 -05:00
|
|
|
|
|
|
|
if (s_lp_cntl.enable) {
|
2021-11-15 04:04:42 -05:00
|
|
|
#if CONFIG_MAC_BB_PD
|
2020-12-24 22:53:08 -05:00
|
|
|
if (!btdm_deep_sleep_mem_init()) {
|
2020-12-26 10:44:23 -05:00
|
|
|
err = ESP_ERR_NO_MEM;
|
2023-12-22 04:25:00 -05:00
|
|
|
break;
|
2020-12-24 22:53:08 -05:00
|
|
|
}
|
|
|
|
s_lp_cntl.mac_bb_pd = 1;
|
|
|
|
#endif
|
2021-01-28 09:28:04 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2020-12-24 22:53:08 -05:00
|
|
|
s_lp_cntl.wakeup_timer_required = 1;
|
|
|
|
#endif
|
|
|
|
// async wakeup semaphore for VHCI
|
|
|
|
s_wakeup_req_sem = semphr_create_wrapper(1, 0);
|
|
|
|
if (s_wakeup_req_sem == NULL) {
|
|
|
|
err = ESP_ERR_NO_MEM;
|
2023-12-22 04:25:00 -05:00
|
|
|
break;
|
2020-12-24 22:53:08 -05:00
|
|
|
}
|
|
|
|
btdm_vnd_offload_task_register(BTDM_VND_OL_SIG_WAKEUP_TMR, btdm_sleep_exit_phase0);
|
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
if (s_lp_cntl.wakeup_timer_required) {
|
|
|
|
esp_timer_create_args_t create_args = {
|
|
|
|
.callback = btdm_slp_tmr_callback,
|
|
|
|
.arg = NULL,
|
|
|
|
.name = "btSlp",
|
|
|
|
};
|
|
|
|
if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
|
|
|
|
break;
|
|
|
|
}
|
2020-12-24 22:53:08 -05:00
|
|
|
}
|
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
// set default bluetooth sleep clock cycle and its fractional bits
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
|
|
|
btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
|
2020-12-24 22:53:08 -05:00
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL) { // External 32 kHz XTAL
|
|
|
|
// check whether or not EXT_CRYS is working
|
|
|
|
if (rtc_clk_slow_src_get() != SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
|
|
|
|
ESP_LOGW(BT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
|
|
|
|
s_lp_cntl.lpclk_sel = ESP_BT_SLEEP_CLOCK_MAIN_XTAL;
|
2021-10-13 03:13:21 -04:00
|
|
|
#if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
|
2023-12-22 04:25:00 -05:00
|
|
|
s_lp_cntl.no_light_sleep = 1;
|
2021-10-13 03:13:21 -04:00
|
|
|
#endif
|
2023-12-22 04:25:00 -05:00
|
|
|
}
|
|
|
|
} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_RTC_SLOW) { // Internal 136kHz RC oscillator
|
|
|
|
if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
|
|
|
|
ESP_LOGW(BT_LOG_TAG, "Internal 136kHz RC oscillator. The accuracy of this clock is a lot larger than 500ppm which is "
|
|
|
|
"required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
|
|
|
|
} else {
|
|
|
|
ESP_LOGW(BT_LOG_TAG, "Internal 136kHz RC oscillator not detected.");
|
|
|
|
assert(0);
|
|
|
|
}
|
|
|
|
} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
|
|
|
|
ESP_LOGI(BT_LOG_TAG, "Bluetooth will use main XTAL as Bluetooth sleep clock.");
|
2021-10-13 03:13:21 -04:00
|
|
|
#if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
|
2023-12-22 04:25:00 -05:00
|
|
|
s_lp_cntl.no_light_sleep = 1;
|
2021-10-13 03:13:21 -04:00
|
|
|
#endif
|
2023-12-22 04:25:00 -05:00
|
|
|
}
|
2021-01-28 09:28:04 -05:00
|
|
|
} else {
|
2023-12-22 04:25:00 -05:00
|
|
|
s_lp_cntl.no_light_sleep = 1;
|
2021-01-28 09:28:04 -05:00
|
|
|
}
|
2020-12-24 22:53:08 -05:00
|
|
|
|
2021-02-12 00:01:05 -05:00
|
|
|
bool select_src_ret __attribute__((unused));
|
|
|
|
bool set_div_ret __attribute__((unused));
|
2023-12-22 04:25:00 -05:00
|
|
|
if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
|
2021-10-13 03:13:21 -04:00
|
|
|
#ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
|
|
|
|
ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON));
|
|
|
|
s_lp_cntl.main_xtal_pu = 1;
|
|
|
|
#endif
|
2020-12-24 22:53:08 -05:00
|
|
|
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
|
2021-10-13 03:13:21 -04:00
|
|
|
set_div_ret = btdm_lpclk_set_div(esp_clk_xtal_freq() / MHZ);
|
2020-12-24 22:53:08 -05:00
|
|
|
assert(select_src_ret && set_div_ret);
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
2021-10-13 03:13:21 -04:00
|
|
|
btdm_lpcycle_us = 1 << (btdm_lpcycle_us_frac);
|
2023-12-22 04:25:00 -05:00
|
|
|
} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL) {
|
2021-01-28 09:28:04 -05:00
|
|
|
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
|
|
|
|
set_div_ret = btdm_lpclk_set_div(0);
|
|
|
|
assert(select_src_ret && set_div_ret);
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
|
|
|
btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
|
|
|
|
(1000000 >> (15 - RTC_CLK_CAL_FRACT));
|
|
|
|
assert(btdm_lpcycle_us != 0);
|
2023-12-22 04:25:00 -05:00
|
|
|
} else if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_RTC_SLOW) {
|
2021-01-28 09:28:04 -05:00
|
|
|
select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
|
|
|
|
set_div_ret = btdm_lpclk_set_div(0);
|
|
|
|
assert(select_src_ret && set_div_ret);
|
|
|
|
btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
|
|
|
|
btdm_lpcycle_us = esp_clk_slowclk_cal_get();
|
2020-12-24 22:53:08 -05:00
|
|
|
} else {
|
2021-01-28 09:28:04 -05:00
|
|
|
err = ESP_ERR_INVALID_ARG;
|
2023-12-22 04:25:00 -05:00
|
|
|
break;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
2021-10-25 09:19:47 -04:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_update_lpclk_interval();
|
|
|
|
#endif
|
2021-10-20 07:32:21 -04:00
|
|
|
|
2020-12-24 22:53:08 -05:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
|
2023-12-22 04:25:00 -05:00
|
|
|
break;
|
2020-12-24 22:53:08 -05:00
|
|
|
}
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGW(BT_LOG_TAG, "light sleep mode will not be able to apply when bluetooth is enabled.");
|
2020-12-24 22:53:08 -05:00
|
|
|
}
|
|
|
|
if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
|
2023-12-22 04:25:00 -05:00
|
|
|
break;
|
2020-12-24 22:53:08 -05:00
|
|
|
} else {
|
|
|
|
s_lp_stat.pm_lock_released = 1;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
#endif
|
2020-12-24 22:53:08 -05:00
|
|
|
} while (0);
|
2020-07-09 08:58:13 -04:00
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_bt_sleep_clock_t esp_bt_get_lpclk_src(void)
|
|
|
|
{
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED &&
|
|
|
|
btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_BT_SLEEP_CLOCK_NONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
return s_lp_cntl.lpclk_sel;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
|
|
|
|
{
|
|
|
|
esp_err_t err = ESP_FAIL;
|
|
|
|
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cfg == NULL) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
|
|
|
|
|| cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
|
|
|
|
ESP_LOGE(BT_LOG_TAG, "Invalid controller task prioriy or stack size");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
|
|
|
|
ESP_LOGE(BT_LOG_TAG, "%s controller only support BLE only mode", __func__);
|
|
|
|
return ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
|
|
|
|
if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
|
|
|
|
ESP_LOGE(BT_LOG_TAG, "Invalid value of ble_max_act");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
|
|
|
|
if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
|
|
|
|
ESP_LOGE(BT_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
if (cfg->sleep_clock > ESP_BT_SLEEP_CLOCK_RTC_SLOW) {
|
|
|
|
ESP_LOGE(BT_LOG_TAG, "SLEEP_MODE_1 is enabled but this sleep clock is not supported");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// overwrite some parameters
|
|
|
|
cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
|
|
|
|
|
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
esp_mac_bb_pd_mem_init();
|
|
|
|
#endif
|
|
|
|
esp_phy_modem_init();
|
|
|
|
esp_bt_power_domain_on();
|
|
|
|
|
|
|
|
btdm_controller_mem_init();
|
|
|
|
|
|
|
|
osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
|
|
|
|
if (osi_funcs_p == NULL) {
|
|
|
|
return ESP_ERR_NO_MEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
|
|
|
|
if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
ESP_LOGI(BT_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
|
|
|
|
|
|
|
|
if ((err = btdm_low_power_mode_init(cfg)) != ESP_OK) {
|
|
|
|
ESP_LOGE(BT_LOG_TAG, "Low power module initialization failed");
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
2021-01-25 04:12:36 -05:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
2020-07-09 08:58:13 -04:00
|
|
|
coex_init();
|
|
|
|
#endif
|
|
|
|
|
|
|
|
periph_module_enable(PERIPH_BT_MODULE);
|
2022-07-01 05:39:51 -04:00
|
|
|
periph_module_reset(PERIPH_BT_MODULE);
|
2020-12-24 22:53:08 -05:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
if (btdm_controller_init(cfg) != 0) {
|
|
|
|
err = ESP_ERR_NO_MEM;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
|
|
|
|
|
|
|
return ESP_OK;
|
|
|
|
|
|
|
|
error:
|
2021-10-20 07:32:21 -04:00
|
|
|
|
2022-12-07 22:54:26 -05:00
|
|
|
bt_controller_deinit_internal();
|
2021-01-28 09:28:04 -05:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_deinit(void)
|
|
|
|
{
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
|
|
|
btdm_controller_deinit();
|
2022-12-07 22:54:26 -05:00
|
|
|
|
|
|
|
bt_controller_deinit_internal();
|
|
|
|
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
// deinit low power control resources
|
|
|
|
static void btdm_low_power_mode_deinit(void)
|
2022-12-07 22:54:26 -05:00
|
|
|
{
|
2021-11-15 04:04:42 -05:00
|
|
|
#if CONFIG_MAC_BB_PD
|
2023-12-22 04:25:00 -05:00
|
|
|
if (s_lp_cntl.mac_bb_pd) {
|
|
|
|
btdm_deep_sleep_mem_deinit();
|
|
|
|
s_lp_cntl.mac_bb_pd = 0;
|
|
|
|
}
|
2020-12-24 22:53:08 -05:00
|
|
|
#endif
|
2021-01-28 09:28:04 -05:00
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2023-12-22 04:25:00 -05:00
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
if (s_light_sleep_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_light_sleep_pm_lock);
|
|
|
|
s_light_sleep_pm_lock = NULL;
|
2020-12-24 22:53:08 -05:00
|
|
|
}
|
2023-12-22 04:25:00 -05:00
|
|
|
}
|
2020-12-24 22:53:08 -05:00
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
if (s_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
|
|
|
s_lp_stat.pm_lock_released = 0;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
#endif
|
2022-12-07 22:54:26 -05:00
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
if (s_lp_cntl.wakeup_timer_required && s_btdm_slp_tmr != NULL) {
|
|
|
|
if (s_lp_stat.wakeup_timer_started) {
|
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
2020-12-24 22:53:08 -05:00
|
|
|
}
|
2023-12-22 04:25:00 -05:00
|
|
|
s_lp_stat.wakeup_timer_started = 0;
|
|
|
|
esp_timer_delete(s_btdm_slp_tmr);
|
|
|
|
s_btdm_slp_tmr = NULL;
|
|
|
|
}
|
2020-12-24 22:53:08 -05:00
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
if (s_lp_cntl.enable) {
|
|
|
|
btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
|
|
|
|
if (s_wakeup_req_sem != NULL) {
|
|
|
|
semphr_delete_wrapper(s_wakeup_req_sem);
|
|
|
|
s_wakeup_req_sem = NULL;
|
2020-12-24 22:53:08 -05:00
|
|
|
}
|
2023-12-22 04:25:00 -05:00
|
|
|
}
|
2022-12-07 22:54:26 -05:00
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
if (s_lp_cntl.lpclk_sel == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
|
2021-10-13 03:13:21 -04:00
|
|
|
#ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
|
2023-12-22 04:25:00 -05:00
|
|
|
if (s_lp_cntl.main_xtal_pu) {
|
|
|
|
ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_OFF));
|
|
|
|
s_lp_cntl.main_xtal_pu = 0;
|
|
|
|
}
|
2021-10-13 03:13:21 -04:00
|
|
|
#endif
|
2023-12-22 04:25:00 -05:00
|
|
|
btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
|
|
|
|
btdm_lpclk_set_div(0);
|
2021-10-25 09:19:47 -04:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
2023-12-22 04:25:00 -05:00
|
|
|
coex_update_lpclk_interval();
|
2021-10-25 09:19:47 -04:00
|
|
|
#endif
|
2023-12-22 04:25:00 -05:00
|
|
|
}
|
2021-10-20 07:32:21 -04:00
|
|
|
|
2023-12-22 04:25:00 -05:00
|
|
|
btdm_lpcycle_us = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void bt_controller_deinit_internal(void)
|
|
|
|
{
|
|
|
|
periph_module_disable(PERIPH_BT_MODULE);
|
|
|
|
|
|
|
|
btdm_low_power_mode_deinit();
|
2020-12-24 22:53:08 -05:00
|
|
|
|
2021-09-14 05:47:09 -04:00
|
|
|
esp_bt_power_domain_off();
|
2022-05-28 12:13:32 -04:00
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
esp_mac_bb_pd_mem_deinit();
|
|
|
|
#endif
|
2022-11-24 07:18:27 -05:00
|
|
|
esp_phy_modem_deinit();
|
2021-09-14 05:47:09 -04:00
|
|
|
|
2022-12-07 22:54:26 -05:00
|
|
|
if (osi_funcs_p != NULL) {
|
|
|
|
free(osi_funcs_p);
|
|
|
|
osi_funcs_p = NULL;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
|
|
|
{
|
2023-01-04 02:34:05 -05:00
|
|
|
esp_err_t ret = ESP_OK;
|
2020-07-09 08:58:13 -04:00
|
|
|
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
|
|
|
|
//As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
|
|
|
|
if (mode != btdm_controller_get_mode()) {
|
2023-02-21 01:47:41 -05:00
|
|
|
ESP_LOGE(BT_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
|
2020-07-09 08:58:13 -04:00
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
2023-07-07 07:50:24 -04:00
|
|
|
/* Enable PHY when enabling controller to reduce power dissipation after controller init
|
|
|
|
* Notice the init order: esp_phy_enable() -> bt_bb_v2_init_cmplx() -> coex_pti_v2()
|
|
|
|
*/
|
2023-09-07 03:30:48 -04:00
|
|
|
esp_phy_enable(PHY_MODEM_BT);
|
2023-07-07 07:50:24 -04:00
|
|
|
s_lp_stat.phy_enabled = 1;
|
|
|
|
|
2021-01-25 04:12:36 -05:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
2020-07-09 08:58:13 -04:00
|
|
|
coex_enable();
|
|
|
|
#endif
|
|
|
|
|
2020-12-24 22:53:08 -05:00
|
|
|
// enable low power mode
|
|
|
|
do {
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
esp_pm_lock_acquire(s_light_sleep_pm_lock);
|
|
|
|
}
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
s_lp_stat.pm_lock_released = 0;
|
|
|
|
#endif
|
|
|
|
|
2024-01-04 04:24:03 -05:00
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
|
|
|
|
ret = ESP_ERR_INVALID_ARG;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
|
|
|
|
ret = ESP_ERR_INVALID_ARG;
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2020-12-26 10:44:23 -05:00
|
|
|
if (s_lp_cntl.enable) {
|
2020-12-24 22:53:08 -05:00
|
|
|
btdm_controller_enable_sleep(true);
|
|
|
|
}
|
|
|
|
} while (0);
|
|
|
|
|
2023-09-08 03:44:00 -04:00
|
|
|
// Disable pll track by default in BLE controller on ESP32-C3 and ESP32-S3
|
|
|
|
sdk_config_extend_set_pll_track(false);
|
|
|
|
|
2020-12-26 10:44:23 -05:00
|
|
|
if (btdm_controller_enable(mode) != 0) {
|
|
|
|
ret = ESP_ERR_INVALID_STATE;
|
|
|
|
goto error;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
2023-07-07 07:50:24 -04:00
|
|
|
coex_pti_v2();
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
|
|
|
|
|
2020-12-26 10:44:23 -05:00
|
|
|
return ret;
|
|
|
|
|
|
|
|
error:
|
|
|
|
// disable low power mode
|
|
|
|
do {
|
2024-01-04 04:24:03 -05:00
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
|
|
|
|
esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
|
|
|
|
#endif
|
|
|
|
|
2020-12-26 10:44:23 -05:00
|
|
|
btdm_controller_enable_sleep(false);
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
esp_pm_lock_release(s_light_sleep_pm_lock);
|
|
|
|
}
|
|
|
|
if (s_lp_stat.pm_lock_released == 0) {
|
|
|
|
esp_pm_lock_release(s_pm_lock);
|
|
|
|
s_lp_stat.pm_lock_released = 1;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
} while (0);
|
|
|
|
|
2023-01-04 02:34:05 -05:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_disable();
|
|
|
|
#endif
|
2023-07-07 07:50:24 -04:00
|
|
|
if (s_lp_stat.phy_enabled) {
|
2023-09-07 03:30:48 -04:00
|
|
|
esp_phy_disable(PHY_MODEM_BT);
|
2023-07-07 07:50:24 -04:00
|
|
|
s_lp_stat.phy_enabled = 0;
|
|
|
|
}
|
2020-12-26 10:44:23 -05:00
|
|
|
return ret;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_disable(void)
|
|
|
|
{
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
2020-12-24 22:53:08 -05:00
|
|
|
|
|
|
|
async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
|
2021-01-28 09:28:04 -05:00
|
|
|
while (!btdm_power_state_active()){}
|
2020-07-09 08:58:13 -04:00
|
|
|
btdm_controller_disable();
|
|
|
|
|
2020-12-24 22:53:08 -05:00
|
|
|
async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_DISA);
|
|
|
|
|
2021-01-25 04:12:36 -05:00
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
2020-07-09 08:58:13 -04:00
|
|
|
coex_disable();
|
|
|
|
#endif
|
2023-07-07 07:50:24 -04:00
|
|
|
if (s_lp_stat.phy_enabled) {
|
2023-09-07 03:30:48 -04:00
|
|
|
esp_phy_disable(PHY_MODEM_BT);
|
2023-07-07 07:50:24 -04:00
|
|
|
s_lp_stat.phy_enabled = 0;
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
|
|
|
|
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
2020-12-24 22:53:08 -05:00
|
|
|
|
|
|
|
// disable low power mode
|
|
|
|
do {
|
2024-01-04 04:24:03 -05:00
|
|
|
#if CONFIG_MAC_BB_PD
|
|
|
|
esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
|
|
|
|
esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
|
|
|
|
#endif
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
#ifdef CONFIG_PM_ENABLE
|
2020-12-24 22:53:08 -05:00
|
|
|
if (s_lp_cntl.no_light_sleep) {
|
|
|
|
esp_pm_lock_release(s_light_sleep_pm_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (s_lp_stat.pm_lock_released == 0) {
|
|
|
|
esp_pm_lock_release(s_pm_lock);
|
|
|
|
s_lp_stat.pm_lock_released = 1;
|
|
|
|
} else {
|
|
|
|
assert(0);
|
|
|
|
}
|
2020-07-09 08:58:13 -04:00
|
|
|
#endif
|
2020-12-24 22:53:08 -05:00
|
|
|
} while (0);
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_bt_controller_status_t esp_bt_controller_get_status(void)
|
|
|
|
{
|
|
|
|
return btdm_controller_status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* extra functions */
|
|
|
|
esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
|
|
|
|
{
|
2021-03-16 08:36:05 -04:00
|
|
|
esp_err_t stat = ESP_FAIL;
|
|
|
|
|
|
|
|
switch (power_type) {
|
|
|
|
case ESP_BLE_PWR_TYPE_ADV:
|
|
|
|
case ESP_BLE_PWR_TYPE_SCAN:
|
|
|
|
case ESP_BLE_PWR_TYPE_DEFAULT:
|
|
|
|
if (ble_txpwr_set(power_type, power_level) == 0) {
|
|
|
|
stat = ESP_OK;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
stat = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return stat;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
|
|
|
|
{
|
2021-03-16 08:36:05 -04:00
|
|
|
esp_power_level_t lvl;
|
|
|
|
|
|
|
|
switch (power_type) {
|
|
|
|
case ESP_BLE_PWR_TYPE_ADV:
|
|
|
|
case ESP_BLE_PWR_TYPE_SCAN:
|
|
|
|
lvl = (esp_power_level_t)ble_txpwr_get(power_type);
|
|
|
|
break;
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL0:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL1:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL2:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL3:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL4:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL5:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL6:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL7:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL8:
|
|
|
|
case ESP_BLE_PWR_TYPE_DEFAULT:
|
|
|
|
lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
lvl = ESP_PWR_LVL_INVALID;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return lvl;
|
2020-07-09 08:58:13 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_sleep_enable (void)
|
|
|
|
{
|
|
|
|
esp_err_t status;
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
|
|
|
btdm_controller_enable_sleep (true);
|
|
|
|
status = ESP_OK;
|
|
|
|
} else {
|
|
|
|
status = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_sleep_disable (void)
|
|
|
|
{
|
|
|
|
esp_err_t status;
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
|
|
|
|
btdm_controller_enable_sleep (false);
|
|
|
|
status = ESP_OK;
|
|
|
|
} else {
|
|
|
|
status = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool esp_bt_controller_is_sleeping(void)
|
|
|
|
{
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
|
|
|
|
btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
return !btdm_power_state_active();
|
|
|
|
}
|
|
|
|
|
|
|
|
void esp_bt_controller_wakeup_request(void)
|
|
|
|
{
|
|
|
|
if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
|
|
|
|
btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
btdm_wakeup_request();
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
|
|
|
|
{
|
|
|
|
return btdm_hci_tl_io_event_post(event);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t esp_bt_get_tx_buf_num(void)
|
|
|
|
{
|
|
|
|
return l2c_ble_link_get_tx_buf_num();
|
|
|
|
}
|
|
|
|
|
|
|
|
static void coex_wifi_sleep_set_hook(bool sleep)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
2024-03-19 04:46:37 -04:00
|
|
|
|
|
|
|
static int coex_schm_register_btdm_callback_wrapper(void *callback)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
return coex_schm_register_callback(COEX_SCHM_CALLBACK_TYPE_BT, callback);
|
|
|
|
#else
|
|
|
|
return 0;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_schm_status_bit_clear(type, status);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_schm_status_bit_set(type, status);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t coex_schm_interval_get_wrapper(void)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
return coex_schm_interval_get();
|
|
|
|
#else
|
|
|
|
return 0;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint8_t coex_schm_curr_period_get_wrapper(void)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
return coex_schm_curr_period_get();
|
|
|
|
#else
|
|
|
|
return 1;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static void * coex_schm_curr_phase_get_wrapper(void)
|
|
|
|
{
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
return coex_schm_curr_phase_get();
|
|
|
|
#else
|
|
|
|
return NULL;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2020-07-09 08:58:13 -04:00
|
|
|
#endif /* CONFIG_BT_ENABLED */
|