2022-05-28 05:03:05 -04:00
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <stdarg.h>
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#include <sys/cdefs.h>
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#include "sdkconfig.h"
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#if CONFIG_MCPWM_ENABLE_DEBUG_LOG
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// The local log level must be defined before including esp_log.h
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// Set the maximum log level for this source file
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#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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#endif
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#include "freertos/FreeRTOS.h"
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#include "esp_attr.h"
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#include "esp_check.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "esp_memory_utils.h"
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#include "soc/soc_caps.h"
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#include "soc/mcpwm_periph.h"
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#include "hal/mcpwm_ll.h"
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#include "driver/mcpwm_oper.h"
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#include "mcpwm_private.h"
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static const char *TAG = "mcpwm";
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static void mcpwm_operator_default_isr(void *args);
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static esp_err_t mcpwm_operator_register_to_group(mcpwm_oper_t *oper, int group_id)
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{
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mcpwm_group_t *group = mcpwm_acquire_group_handle(group_id);
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ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", group_id);
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int oper_id = -1;
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portENTER_CRITICAL(&group->spinlock);
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for (int i = 0; i < SOC_MCPWM_OPERATORS_PER_GROUP; i++) {
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if (!group->operators[i]) {
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oper_id = i;
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group->operators[i] = oper;
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break;
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}
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}
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portEXIT_CRITICAL(&group->spinlock);
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if (oper_id < 0) {
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mcpwm_release_group_handle(group);
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group = NULL;
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} else {
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oper->group = group;
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oper->oper_id = oper_id;
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}
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ESP_RETURN_ON_FALSE(oper_id >= 0, ESP_ERR_NOT_FOUND, TAG, "no free operators in group (%d)", group_id);
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return ESP_OK;
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}
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static void mcpwm_operator_unregister_from_group(mcpwm_oper_t *oper)
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{
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mcpwm_group_t *group = oper->group;
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int oper_id = oper->oper_id;
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portENTER_CRITICAL(&group->spinlock);
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group->operators[oper_id] = NULL;
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portEXIT_CRITICAL(&group->spinlock);
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// operator has a reference on group, release it now
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mcpwm_release_group_handle(group);
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}
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static esp_err_t mcpwm_operator_destory(mcpwm_oper_t *oper)
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{
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if (oper->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_free(oper->intr), TAG, "uninstall interrupt service failed");
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}
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if (oper->group) {
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mcpwm_operator_unregister_from_group(oper);
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}
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free(oper);
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return ESP_OK;
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}
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esp_err_t mcpwm_new_operator(const mcpwm_operator_config_t *config, mcpwm_oper_handle_t *ret_oper)
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{
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#if CONFIG_MCPWM_ENABLE_DEBUG_LOG
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esp_log_level_set(TAG, ESP_LOG_DEBUG);
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#endif
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esp_err_t ret = ESP_OK;
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2022-08-16 05:57:02 -04:00
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mcpwm_oper_t *oper = NULL;
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2022-05-28 05:03:05 -04:00
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ESP_GOTO_ON_FALSE(config && ret_oper, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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ESP_GOTO_ON_FALSE(config->group_id < SOC_MCPWM_GROUPS && config->group_id >= 0, ESP_ERR_INVALID_ARG,
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err, TAG, "invalid group ID:%d", config->group_id);
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2022-08-16 05:57:02 -04:00
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oper = heap_caps_calloc(1, sizeof(mcpwm_oper_t), MCPWM_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(oper, ESP_ERR_NO_MEM, err, TAG, "no mem for operator");
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2022-05-28 05:03:05 -04:00
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2022-08-16 05:57:02 -04:00
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ESP_GOTO_ON_ERROR(mcpwm_operator_register_to_group(oper, config->group_id), err, TAG, "register operator failed");
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mcpwm_group_t *group = oper->group;
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2022-05-28 05:03:05 -04:00
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int group_id = group->group_id;
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mcpwm_hal_context_t *hal = &group->hal;
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int oper_id = oper->oper_id;
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2022-05-28 05:03:05 -04:00
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// reset MCPWM operator
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mcpwm_hal_operator_reset(hal, oper_id);
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// set the time point that the generator can update the action
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mcpwm_ll_operator_enable_update_action_on_tez(hal->dev, oper_id, config->flags.update_gen_action_on_tez);
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mcpwm_ll_operator_enable_update_action_on_tep(hal->dev, oper_id, config->flags.update_gen_action_on_tep);
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mcpwm_ll_operator_enable_update_action_on_sync(hal->dev, oper_id, config->flags.update_gen_action_on_sync);
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// set the time point that the deadtime can update the delay parameter
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mcpwm_ll_deadtime_enable_update_delay_on_tez(hal->dev, oper_id, config->flags.update_dead_time_on_tez);
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mcpwm_ll_deadtime_enable_update_delay_on_tep(hal->dev, oper_id, config->flags.update_dead_time_on_tep);
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mcpwm_ll_deadtime_enable_update_delay_on_sync(hal->dev, oper_id, config->flags.update_dead_time_on_sync);
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// set the clock source for dead time submodule, the resolution is the same to the MCPWM group
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mcpwm_ll_operator_set_deadtime_clock_src(hal->dev, oper_id, MCPWM_LL_DEADTIME_CLK_SRC_GROUP);
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oper->deadtime_resolution_hz = group->resolution_hz;
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2022-05-28 05:03:05 -04:00
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// fill in other operator members
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2022-08-16 05:57:02 -04:00
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oper->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
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*ret_oper = oper;
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ESP_LOGD(TAG, "new operator (%d,%d) at %p", group_id, oper_id, oper);
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2022-05-28 05:03:05 -04:00
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return ESP_OK;
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err:
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2022-08-16 05:57:02 -04:00
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if (oper) {
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mcpwm_operator_destory(oper);
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2022-05-28 05:03:05 -04:00
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}
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return ret;
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}
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esp_err_t mcpwm_del_operator(mcpwm_oper_handle_t oper)
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{
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ESP_RETURN_ON_FALSE(oper, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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for (int i = 0; i < SOC_MCPWM_COMPARATORS_PER_OPERATOR; i++) {
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ESP_RETURN_ON_FALSE(!oper->comparators[i], ESP_ERR_INVALID_STATE, TAG, "comparator still in working");
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}
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for (int i = 0; i < SOC_MCPWM_GENERATORS_PER_OPERATOR; i++) {
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ESP_RETURN_ON_FALSE(!oper->generators[i], ESP_ERR_INVALID_STATE, TAG, "generator still in working");
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}
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ESP_RETURN_ON_FALSE(!oper->soft_fault, ESP_ERR_INVALID_STATE, TAG, "soft fault still in working");
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mcpwm_group_t *group = oper->group;
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int oper_id = oper->oper_id;
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mcpwm_hal_context_t *hal = &group->hal;
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portENTER_CRITICAL(&group->spinlock);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_OPER_MASK(oper_id), false);
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mcpwm_ll_intr_clear_status(hal->dev, MCPWM_LL_EVENT_OPER_MASK(oper_id));
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portEXIT_CRITICAL(&group->spinlock);
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ESP_LOGD(TAG, "del operator (%d,%d)", group->group_id, oper_id);
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// recycle memory resource
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ESP_RETURN_ON_ERROR(mcpwm_operator_destory(oper), TAG, "destory operator failed");
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return ESP_OK;
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}
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esp_err_t mcpwm_operator_connect_timer(mcpwm_oper_handle_t oper, mcpwm_timer_handle_t timer)
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{
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ESP_RETURN_ON_FALSE(oper && timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(oper->group == timer->group, ESP_ERR_INVALID_ARG, TAG, "operator and timer should reside in the same group");
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mcpwm_group_t *group = oper->group;
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mcpwm_hal_context_t *hal = &group->hal;
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// connect operator and timer
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mcpwm_ll_operator_connect_timer(hal->dev, oper->oper_id, timer->timer_id);
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// change the the clock source of deadtime submodule to use MCPWM timer
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mcpwm_ll_operator_set_deadtime_clock_src(hal->dev, oper->oper_id, MCPWM_LL_DEADTIME_CLK_SRC_TIMER);
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oper->deadtime_resolution_hz = timer->resolution_hz;
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oper->timer = timer;
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ESP_LOGD(TAG, "connect operator (%d) and timer (%d) in group (%d)", oper->oper_id, timer->timer_id, group->group_id);
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return ESP_OK;
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}
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esp_err_t mcpwm_operator_apply_carrier(mcpwm_oper_handle_t oper, const mcpwm_carrier_config_t *config)
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{
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ESP_RETURN_ON_FALSE(oper, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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mcpwm_group_t *group = oper->group;
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mcpwm_hal_context_t *hal = &group->hal;
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int oper_id = oper->oper_id;
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uint32_t real_frequency = 0;
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uint32_t real_fpd = 0;
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float real_duty = 0.0;
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if (config && config->frequency_hz) {
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uint8_t pre_scale = group->resolution_hz / 8 / config->frequency_hz;
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mcpwm_ll_carrier_set_prescale(hal->dev, oper_id, pre_scale);
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real_frequency = group->resolution_hz / 8 / pre_scale;
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uint8_t duty = (uint8_t)(config->duty_cycle * 8);
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mcpwm_ll_carrier_set_duty(hal->dev, oper_id, duty);
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real_duty = (float) duty / 8.0F;
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uint8_t first_pulse_ticks = (uint8_t)(config->first_pulse_duration_us * real_frequency / 1000000UL);
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ESP_RETURN_ON_FALSE(first_pulse_ticks > 0 && first_pulse_ticks <= MCPWM_LL_MAX_CARRIER_ONESHOT,
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ESP_ERR_INVALID_ARG, TAG, "invalid first pulse duration");
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mcpwm_ll_carrier_set_first_pulse_width(hal->dev, oper_id, first_pulse_ticks);
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real_fpd = first_pulse_ticks * 1000000UL / real_frequency;
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mcpwm_ll_carrier_in_invert(hal->dev, oper_id, config->flags.invert_before_modulate);
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mcpwm_ll_carrier_out_invert(hal->dev, oper_id, config->flags.invert_after_modulate);
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}
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mcpwm_ll_carrier_enable(hal->dev, oper_id, real_frequency > 0);
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if (real_frequency > 0) {
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2022-08-04 01:08:48 -04:00
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ESP_LOGD(TAG, "enable carrier modulation for operator(%d,%d), freq=%"PRIu32"Hz, duty=%.2f, FPD=%"PRIu32"us",
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group->group_id, oper_id, real_frequency, real_duty, real_fpd);
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} else {
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ESP_LOGD(TAG, "disable carrier for operator (%d,%d)", group->group_id, oper_id);
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}
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return ESP_OK;
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}
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esp_err_t mcpwm_operator_register_event_callbacks(mcpwm_oper_handle_t oper, const mcpwm_operator_event_callbacks_t *cbs, void *user_data)
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{
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ESP_RETURN_ON_FALSE(oper && cbs, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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mcpwm_group_t *group = oper->group;
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mcpwm_hal_context_t *hal = &group->hal;
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int group_id = group->group_id;
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int oper_id = oper->oper_id;
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#if CONFIG_MCWPM_ISR_IRAM_SAFE
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if (cbs->on_brake_cbc) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_brake_cbc), ESP_ERR_INVALID_ARG, TAG, "on_brake_cbc callback not in IRAM");
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}
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if (cbs->on_brake_ost) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_brake_ost), ESP_ERR_INVALID_ARG, TAG, "on_brake_ost callback not in IRAM");
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}
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if (user_data) {
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ESP_RETURN_ON_FALSE(esp_ptr_internal(user_data), ESP_ERR_INVALID_ARG, TAG, "user context not in internal RAM");
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}
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#endif
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// lazy install interrupt service
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if (!oper->intr) {
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2022-08-06 02:52:22 -04:00
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// we want the interrupt service to be enabled after allocation successfully
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int isr_flags = MCPWM_INTR_ALLOC_FLAG & ~ ESP_INTR_FLAG_INTRDISABLED;
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ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(mcpwm_periph_signals.groups[group_id].irq_id, isr_flags,
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(uint32_t)mcpwm_ll_intr_get_status_reg(hal->dev), MCPWM_LL_EVENT_OPER_MASK(oper_id),
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mcpwm_operator_default_isr, oper, &oper->intr), TAG, "install interrupt service for operator failed");
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}
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// enable/disable interrupt events
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portENTER_CRITICAL(&group->spinlock);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_OPER_BRAKE_CBC(oper_id), cbs->on_brake_cbc != NULL);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_OPER_BRAKE_OST(oper_id), cbs->on_brake_ost != NULL);
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portEXIT_CRITICAL(&group->spinlock);
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oper->on_brake_cbc = cbs->on_brake_cbc;
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oper->on_brake_ost = cbs->on_brake_ost;
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oper->user_data = user_data;
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return ESP_OK;
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}
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2022-08-16 05:57:02 -04:00
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esp_err_t mcpwm_operator_set_brake_on_fault(mcpwm_oper_handle_t oper, const mcpwm_brake_config_t *config)
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{
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ESP_RETURN_ON_FALSE(oper && config, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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mcpwm_group_t *group = oper->group;
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2022-05-28 05:03:05 -04:00
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mcpwm_fault_t *fault = config->fault;
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2022-08-16 05:57:02 -04:00
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int oper_id = oper->oper_id;
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2022-05-28 05:03:05 -04:00
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mcpwm_ll_brake_enable_cbc_refresh_on_tez(group->hal.dev, oper_id, config->flags.cbc_recover_on_tez);
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mcpwm_ll_fault_enable_cbc_refresh_on_tep(group->hal.dev, oper_id, config->flags.cbc_recover_on_tep);
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switch (fault->type) {
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case MCPWM_FAULT_TYPE_GPIO: {
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ESP_RETURN_ON_FALSE(group == fault->group, ESP_ERR_INVALID_ARG, TAG, "fault and operator not in the same group");
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mcpwm_gpio_fault_t *gpio_fault = __containerof(fault, mcpwm_gpio_fault_t, base);
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mcpwm_ll_brake_enable_cbc_mode(group->hal.dev, oper_id, gpio_fault->fault_id, config->brake_mode == MCPWM_OPER_BRAKE_MODE_CBC);
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mcpwm_ll_brake_enable_oneshot_mode(group->hal.dev, oper_id, gpio_fault->fault_id, config->brake_mode == MCPWM_OPER_BRAKE_MODE_OST);
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2022-08-16 05:57:02 -04:00
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oper->brake_mode_on_gpio_fault[gpio_fault->fault_id] = config->brake_mode;
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break;
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}
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case MCPWM_FAULT_TYPE_SOFT: {
|
|
|
|
mcpwm_soft_fault_t *soft_fault = __containerof(fault, mcpwm_soft_fault_t, base);
|
2022-08-16 05:57:02 -04:00
|
|
|
ESP_RETURN_ON_FALSE(!soft_fault->oper || soft_fault->oper == oper, ESP_ERR_INVALID_STATE, TAG, "soft fault already used by another operator");
|
|
|
|
soft_fault->oper = oper;
|
|
|
|
soft_fault->base.group = oper->group;
|
2022-05-28 05:03:05 -04:00
|
|
|
mcpwm_ll_brake_enable_soft_cbc(group->hal.dev, oper_id, config->brake_mode == MCPWM_OPER_BRAKE_MODE_CBC);
|
|
|
|
mcpwm_ll_brake_enable_soft_ost(group->hal.dev, oper_id, config->brake_mode == MCPWM_OPER_BRAKE_MODE_OST);
|
2022-08-16 05:57:02 -04:00
|
|
|
oper->brake_mode_on_soft_fault = config->brake_mode;
|
2022-05-28 05:03:05 -04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
ESP_RETURN_ON_FALSE(false, ESP_ERR_INVALID_ARG, TAG, "unknown fault type:%d", fault->type);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2022-08-16 05:57:02 -04:00
|
|
|
esp_err_t mcpwm_operator_recover_from_fault(mcpwm_oper_handle_t oper, mcpwm_fault_handle_t fault)
|
2022-05-28 05:03:05 -04:00
|
|
|
{
|
2022-08-16 05:57:02 -04:00
|
|
|
ESP_RETURN_ON_FALSE(oper && fault, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
|
|
mcpwm_group_t *group = oper->group;
|
2022-05-28 05:03:05 -04:00
|
|
|
mcpwm_operator_brake_mode_t brake_mode;
|
|
|
|
|
|
|
|
// check the brake mode on the fault event
|
|
|
|
switch (fault->type) {
|
|
|
|
case MCPWM_FAULT_TYPE_GPIO: {
|
|
|
|
mcpwm_gpio_fault_t *gpio_fault = __containerof(fault, mcpwm_gpio_fault_t, base);
|
2022-08-16 05:57:02 -04:00
|
|
|
brake_mode = oper->brake_mode_on_gpio_fault[gpio_fault->fault_id];
|
2022-05-28 05:03:05 -04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case MCPWM_FAULT_TYPE_SOFT:
|
2022-08-16 05:57:02 -04:00
|
|
|
brake_mode = oper->brake_mode_on_soft_fault;
|
2022-05-28 05:03:05 -04:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ESP_RETURN_ON_FALSE(false, ESP_ERR_INVALID_ARG, TAG, "unknown fault type:%d", fault->type);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool fault_signal_is_active = false;
|
|
|
|
if (brake_mode == MCPWM_OPER_BRAKE_MODE_OST) {
|
2022-08-16 05:57:02 -04:00
|
|
|
fault_signal_is_active = mcpwm_ll_ost_brake_active(group->hal.dev, oper->oper_id);
|
2022-05-28 05:03:05 -04:00
|
|
|
// OST brake can't recover automatically, need to manually recovery the operator
|
|
|
|
if (!fault_signal_is_active) {
|
2022-08-16 05:57:02 -04:00
|
|
|
mcpwm_ll_brake_clear_ost(group->hal.dev, oper->oper_id);
|
2022-05-28 05:03:05 -04:00
|
|
|
}
|
|
|
|
} else {
|
2022-08-16 05:57:02 -04:00
|
|
|
fault_signal_is_active = mcpwm_ll_cbc_brake_active(group->hal.dev, oper->oper_id);
|
2022-05-28 05:03:05 -04:00
|
|
|
// CBC brake can recover automatically after deactivating the fault signal
|
|
|
|
}
|
|
|
|
|
|
|
|
ESP_RETURN_ON_FALSE(!fault_signal_is_active, ESP_ERR_INVALID_STATE, TAG, "recover fail, fault signal still active");
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void IRAM_ATTR mcpwm_operator_default_isr(void *args)
|
|
|
|
{
|
|
|
|
mcpwm_oper_t *oper = (mcpwm_oper_t *)args;
|
|
|
|
mcpwm_group_t *group = oper->group;
|
|
|
|
mcpwm_hal_context_t *hal = &group->hal;
|
|
|
|
int oper_id = oper->oper_id;
|
|
|
|
bool need_yield = false;
|
|
|
|
|
|
|
|
uint32_t status = mcpwm_ll_intr_get_status(hal->dev);
|
|
|
|
mcpwm_ll_intr_clear_status(hal->dev, status & MCPWM_LL_EVENT_OPER_MASK(oper_id));
|
|
|
|
|
|
|
|
mcpwm_brake_event_data_t edata = {};
|
|
|
|
|
|
|
|
if (status & MCPWM_LL_EVENT_OPER_BRAKE_CBC(oper_id)) {
|
|
|
|
mcpwm_brake_event_cb_t cb = oper->on_brake_cbc;
|
|
|
|
if (cb) {
|
|
|
|
if (cb(oper, &edata, oper->user_data)) {
|
|
|
|
need_yield = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (status & MCPWM_LL_EVENT_OPER_BRAKE_OST(oper_id)) {
|
|
|
|
mcpwm_brake_event_cb_t cb = oper->on_brake_ost;
|
|
|
|
if (cb) {
|
|
|
|
if (cb(oper, &edata, oper->user_data)) {
|
|
|
|
need_yield = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (need_yield) {
|
|
|
|
portYIELD_FROM_ISR();
|
|
|
|
}
|
|
|
|
}
|