2016-12-19 09:19:47 -05:00
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/*
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2024-01-24 00:28:15 -05:00
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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2016-12-19 09:19:47 -05:00
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*
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2021-10-12 09:30:13 -04:00
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* SPDX-License-Identifier: Apache-2.0
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2016-12-19 09:19:47 -05:00
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*/
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2023-10-17 10:13:32 -04:00
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#include <inttypes.h>
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2023-03-08 07:29:27 -05:00
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#include "esp_timer.h"
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2018-06-20 07:59:11 -04:00
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#include "sdmmc_common.h"
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2018-04-02 06:33:01 -04:00
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2016-12-19 09:19:47 -05:00
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static const char* TAG = "sdmmc_cmd";
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2018-05-09 13:12:00 -04:00
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2018-06-20 07:59:11 -04:00
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esp_err_t sdmmc_send_cmd(sdmmc_card_t* card, sdmmc_command_t* cmd)
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2016-12-19 09:19:47 -05:00
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{
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2017-10-12 20:16:07 -04:00
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if (card->host.command_timeout_ms != 0) {
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cmd->timeout_ms = card->host.command_timeout_ms;
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} else if (cmd->timeout_ms == 0) {
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cmd->timeout_ms = SDMMC_DEFAULT_CMD_TIMEOUT_MS;
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}
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2016-12-19 09:19:47 -05:00
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int slot = card->host.slot;
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2023-10-17 10:13:32 -04:00
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ESP_LOGV(TAG, "sending cmd slot=%d op=%" PRIu32 " arg=%" PRIx32 " flags=%x data=%p blklen=%" PRIu32 " datalen=%" PRIu32 " timeout=%" PRIu32,
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slot, cmd->opcode, cmd->arg, cmd->flags, cmd->data, (uint32_t) cmd->blklen, (uint32_t) cmd->datalen, cmd->timeout_ms);
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2016-12-19 09:19:47 -05:00
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esp_err_t err = (*card->host.do_transaction)(slot, cmd);
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if (err != 0) {
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2023-10-17 10:13:32 -04:00
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ESP_LOGD(TAG, "cmd=%" PRIu32 ", sdmmc_req_run returned 0x%x", cmd->opcode, err);
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2016-12-19 09:19:47 -05:00
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return err;
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}
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int state = MMC_R1_CURRENT_STATE(cmd->response);
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2023-10-17 10:13:32 -04:00
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ESP_LOGV(TAG, "cmd response %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " err=0x%x state=%d",
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2016-12-19 09:19:47 -05:00
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cmd->response[0],
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cmd->response[1],
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cmd->response[2],
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cmd->response[3],
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cmd->error,
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state);
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return cmd->error;
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}
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2018-06-20 07:59:11 -04:00
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esp_err_t sdmmc_send_app_cmd(sdmmc_card_t* card, sdmmc_command_t* cmd)
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2016-12-19 09:19:47 -05:00
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{
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sdmmc_command_t app_cmd = {
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.opcode = MMC_APP_CMD,
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.flags = SCF_CMD_AC | SCF_RSP_R1,
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.arg = MMC_ARG_RCA(card->rca),
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};
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esp_err_t err = sdmmc_send_cmd(card, &app_cmd);
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if (err != ESP_OK) {
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return err;
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}
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2017-07-04 00:52:40 -04:00
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// Check APP_CMD status bit (only in SD mode)
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if (!host_is_spi(card) && !(MMC_R1(app_cmd.response) & MMC_R1_APP_CMD)) {
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2016-12-19 09:19:47 -05:00
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ESP_LOGW(TAG, "card doesn't support APP_CMD");
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return ESP_ERR_NOT_SUPPORTED;
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}
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return sdmmc_send_cmd(card, cmd);
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}
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2018-06-20 07:59:11 -04:00
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esp_err_t sdmmc_send_cmd_go_idle_state(sdmmc_card_t* card)
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2016-12-19 09:19:47 -05:00
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{
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sdmmc_command_t cmd = {
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.opcode = MMC_GO_IDLE_STATE,
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.flags = SCF_CMD_BC | SCF_RSP_R0,
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};
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2018-04-02 06:33:01 -04:00
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esp_err_t err = sdmmc_send_cmd(card, &cmd);
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if (host_is_spi(card)) {
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/* To enter SPI mode, CMD0 needs to be sent twice (see figure 4-1 in
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* SD Simplified spec v4.10). Some cards enter SD mode on first CMD0,
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* so don't expect the above command to succeed.
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* SCF_RSP_R1 flag below tells the lower layer to expect correct R1
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* response (in SPI mode).
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*/
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(void) err;
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vTaskDelay(SDMMC_GO_IDLE_DELAY_MS / portTICK_PERIOD_MS);
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cmd.flags |= SCF_RSP_R1;
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err = sdmmc_send_cmd(card, &cmd);
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}
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2018-06-20 07:59:11 -04:00
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if (err == ESP_OK) {
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vTaskDelay(SDMMC_GO_IDLE_DELAY_MS / portTICK_PERIOD_MS);
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}
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2018-04-02 06:33:01 -04:00
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return err;
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2016-12-19 09:19:47 -05:00
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}
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2018-06-20 07:59:11 -04:00
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esp_err_t sdmmc_send_cmd_send_if_cond(sdmmc_card_t* card, uint32_t ocr)
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2016-12-19 09:19:47 -05:00
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{
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const uint8_t pattern = 0xaa; /* any pattern will do here */
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sdmmc_command_t cmd = {
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.opcode = SD_SEND_IF_COND,
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.arg = (((ocr & SD_OCR_VOL_MASK) != 0) << 8) | pattern,
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.flags = SCF_CMD_BCR | SCF_RSP_R7,
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};
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esp_err_t err = sdmmc_send_cmd(card, &cmd);
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if (err != ESP_OK) {
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return err;
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}
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uint8_t response = cmd.response[0] & 0xff;
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if (response != pattern) {
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2017-07-04 00:52:40 -04:00
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ESP_LOGD(TAG, "%s: received=0x%x expected=0x%x", __func__, response, pattern);
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2016-12-19 09:19:47 -05:00
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return ESP_ERR_INVALID_RESPONSE;
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}
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return ESP_OK;
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}
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2018-06-20 07:59:11 -04:00
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esp_err_t sdmmc_send_cmd_send_op_cond(sdmmc_card_t* card, uint32_t ocr, uint32_t *ocrp)
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2016-12-19 09:19:47 -05:00
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{
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2018-05-09 13:12:00 -04:00
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esp_err_t err;
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2020-11-10 02:40:01 -05:00
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2022-09-19 15:15:23 -04:00
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/* If the host supports this, keep card clock enabled
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* from the start of ACMD41 until the card is idle.
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* (Ref. SD spec, section 4.4 "Clock control".)
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*/
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if (card->host.set_cclk_always_on != NULL) {
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err = card->host.set_cclk_always_on(card->host.slot, true);
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if (err != ESP_OK) {
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ESP_LOGE(TAG, "%s: set_cclk_always_on (1) err=0x%x", __func__, err);
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return err;
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}
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ESP_LOGV(TAG, "%s: keeping clock on during ACMD41", __func__);
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}
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2016-12-19 09:19:47 -05:00
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sdmmc_command_t cmd = {
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.arg = ocr,
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.flags = SCF_CMD_BCR | SCF_RSP_R3,
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.opcode = SD_APP_OP_COND
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};
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2018-04-02 06:33:01 -04:00
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int nretries = SDMMC_SEND_OP_COND_MAX_RETRIES;
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int err_cnt = SDMMC_SEND_OP_COND_MAX_ERRORS;
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2016-12-19 09:19:47 -05:00
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for (; nretries != 0; --nretries) {
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2018-05-09 13:12:00 -04:00
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bzero(&cmd, sizeof cmd);
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cmd.arg = ocr;
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cmd.flags = SCF_CMD_BCR | SCF_RSP_R3;
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2018-06-20 07:59:11 -04:00
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if (!card->is_mmc) { /* SD mode */
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cmd.opcode = SD_APP_OP_COND;
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err = sdmmc_send_app_cmd(card, &cmd);
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} else { /* MMC mode */
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2018-05-09 13:12:00 -04:00
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cmd.arg &= ~MMC_OCR_ACCESS_MODE_MASK;
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cmd.arg |= MMC_OCR_SECTOR_MODE;
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cmd.opcode = MMC_SEND_OP_COND;
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err = sdmmc_send_cmd(card, &cmd);
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2018-06-20 07:59:11 -04:00
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}
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2020-11-10 02:40:01 -05:00
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2016-12-19 09:19:47 -05:00
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if (err != ESP_OK) {
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2018-04-02 06:33:01 -04:00
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if (--err_cnt == 0) {
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ESP_LOGD(TAG, "%s: sdmmc_send_app_cmd err=0x%x", __func__, err);
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2022-09-19 15:15:23 -04:00
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goto done;
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2018-04-02 06:33:01 -04:00
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} else {
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ESP_LOGV(TAG, "%s: ignoring err=0x%x", __func__, err);
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continue;
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}
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2016-12-19 09:19:47 -05:00
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}
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2017-07-04 00:52:40 -04:00
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// In SD protocol, card sets MEM_READY bit in OCR when it is ready.
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// In SPI protocol, card clears IDLE_STATE bit in R1 response.
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if (!host_is_spi(card)) {
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if ((MMC_R3(cmd.response) & MMC_OCR_MEM_READY) ||
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ocr == 0) {
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break;
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}
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} else {
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if ((SD_SPI_R1(cmd.response) & SD_SPI_R1_IDLE_STATE) == 0) {
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break;
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}
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2016-12-19 09:19:47 -05:00
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}
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vTaskDelay(10 / portTICK_PERIOD_MS);
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}
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2022-09-19 15:15:23 -04:00
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2016-12-19 09:19:47 -05:00
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if (nretries == 0) {
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2022-09-19 15:15:23 -04:00
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err = ESP_ERR_TIMEOUT;
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goto done;
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2016-12-19 09:19:47 -05:00
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}
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2022-09-19 15:15:23 -04:00
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2016-12-19 09:19:47 -05:00
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if (ocrp) {
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*ocrp = MMC_R3(cmd.response);
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}
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2022-09-19 15:15:23 -04:00
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err = ESP_OK;
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done:
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if (card->host.set_cclk_always_on != NULL) {
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esp_err_t err_cclk_dis = card->host.set_cclk_always_on(card->host.slot, false);
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if (err_cclk_dis != ESP_OK) {
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ESP_LOGE(TAG, "%s: set_cclk_always_on (2) err=0x%x", __func__, err);
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/* If we failed to disable clock, don't overwrite 'err' to return the original error */
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}
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ESP_LOGV(TAG, "%s: clock always-on mode disabled", __func__);
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}
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return err;
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2016-12-19 09:19:47 -05:00
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}
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2018-06-20 07:59:11 -04:00
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esp_err_t sdmmc_send_cmd_read_ocr(sdmmc_card_t *card, uint32_t *ocrp)
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2017-07-04 00:52:40 -04:00
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{
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assert(ocrp);
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sdmmc_command_t cmd = {
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.opcode = SD_READ_OCR,
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.flags = SCF_CMD_BCR | SCF_RSP_R2
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};
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esp_err_t err = sdmmc_send_cmd(card, &cmd);
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if (err != ESP_OK) {
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return err;
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}
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*ocrp = SD_SPI_R3(cmd.response);
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return ESP_OK;
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}
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2016-12-19 09:19:47 -05:00
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2018-06-20 07:59:11 -04:00
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esp_err_t sdmmc_send_cmd_all_send_cid(sdmmc_card_t* card, sdmmc_response_t* out_raw_cid)
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2016-12-19 09:19:47 -05:00
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{
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2018-06-20 07:59:11 -04:00
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assert(out_raw_cid);
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2016-12-19 09:19:47 -05:00
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sdmmc_command_t cmd = {
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.opcode = MMC_ALL_SEND_CID,
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.flags = SCF_CMD_BCR | SCF_RSP_R2
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};
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esp_err_t err = sdmmc_send_cmd(card, &cmd);
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if (err != ESP_OK) {
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return err;
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}
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2018-06-20 07:59:11 -04:00
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memcpy(out_raw_cid, &cmd.response, sizeof(sdmmc_response_t));
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return ESP_OK;
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2016-12-19 09:19:47 -05:00
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}
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2018-06-20 07:59:11 -04:00
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esp_err_t sdmmc_send_cmd_send_cid(sdmmc_card_t *card, sdmmc_cid_t *out_cid)
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2017-07-04 00:52:40 -04:00
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{
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assert(out_cid);
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assert(host_is_spi(card) && "SEND_CID should only be used in SPI mode");
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2018-06-20 07:59:11 -04:00
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assert(!card->is_mmc && "MMC cards are not supported in SPI mode");
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2017-07-04 00:52:40 -04:00
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sdmmc_response_t buf;
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sdmmc_command_t cmd = {
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.opcode = MMC_SEND_CID,
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.flags = SCF_CMD_READ | SCF_CMD_ADTC,
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.arg = 0,
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.data = &buf[0],
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.datalen = sizeof(buf)
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};
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esp_err_t err = sdmmc_send_cmd(card, &cmd);
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if (err != ESP_OK) {
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return err;
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}
|
2018-06-20 07:59:11 -04:00
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sdmmc_flip_byte_order(buf, sizeof(buf));
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2017-07-04 00:52:40 -04:00
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return sdmmc_decode_cid(buf, out_cid);
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}
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2016-12-19 09:19:47 -05:00
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2018-06-20 07:59:11 -04:00
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esp_err_t sdmmc_send_cmd_set_relative_addr(sdmmc_card_t* card, uint16_t* out_rca)
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2016-12-19 09:19:47 -05:00
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{
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assert(out_rca);
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sdmmc_command_t cmd = {
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.opcode = SD_SEND_RELATIVE_ADDR,
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.flags = SCF_CMD_BCR | SCF_RSP_R6
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};
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2018-06-20 07:59:11 -04:00
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/* MMC cards expect us to set the RCA.
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* Set RCA to 1 since we don't support multiple cards on the same bus, for now.
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*/
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uint16_t mmc_rca = 1;
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if (card->is_mmc) {
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cmd.arg = MMC_ARG_RCA(mmc_rca);
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2018-05-09 13:12:00 -04:00
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}
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2016-12-19 09:19:47 -05:00
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esp_err_t err = sdmmc_send_cmd(card, &cmd);
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if (err != ESP_OK) {
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return err;
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}
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2018-06-20 07:59:11 -04:00
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*out_rca = (card->is_mmc) ? mmc_rca : SD_R6_RCA(cmd.response);
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2016-12-19 09:19:47 -05:00
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return ESP_OK;
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}
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2018-06-20 07:59:11 -04:00
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esp_err_t sdmmc_send_cmd_set_blocklen(sdmmc_card_t* card, sdmmc_csd_t* csd)
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2016-12-19 09:19:47 -05:00
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{
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sdmmc_command_t cmd = {
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.opcode = MMC_SET_BLOCKLEN,
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.arg = csd->sector_size,
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.flags = SCF_CMD_AC | SCF_RSP_R1
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};
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return sdmmc_send_cmd(card, &cmd);
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}
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|
|
2018-06-20 07:59:11 -04:00
|
|
|
esp_err_t sdmmc_send_cmd_send_csd(sdmmc_card_t* card, sdmmc_csd_t* out_csd)
|
2016-12-19 09:19:47 -05:00
|
|
|
{
|
2017-07-04 00:52:40 -04:00
|
|
|
/* The trick with SEND_CSD is that in SPI mode, it acts as a data read
|
|
|
|
* command, while in SD mode it is an AC command with R2 response.
|
|
|
|
*/
|
|
|
|
sdmmc_response_t spi_buf;
|
|
|
|
const bool is_spi = host_is_spi(card);
|
2016-12-19 09:19:47 -05:00
|
|
|
sdmmc_command_t cmd = {
|
|
|
|
.opcode = MMC_SEND_CSD,
|
2017-07-04 00:52:40 -04:00
|
|
|
.arg = is_spi ? 0 : MMC_ARG_RCA(card->rca),
|
|
|
|
.flags = is_spi ? (SCF_CMD_READ | SCF_CMD_ADTC | SCF_RSP_R1) :
|
|
|
|
(SCF_CMD_AC | SCF_RSP_R2),
|
|
|
|
.data = is_spi ? &spi_buf[0] : 0,
|
|
|
|
.datalen = is_spi ? sizeof(spi_buf) : 0,
|
2016-12-19 09:19:47 -05:00
|
|
|
};
|
|
|
|
esp_err_t err = sdmmc_send_cmd(card, &cmd);
|
|
|
|
if (err != ESP_OK) {
|
|
|
|
return err;
|
|
|
|
}
|
2017-07-12 07:44:17 -04:00
|
|
|
uint32_t* ptr = cmd.response;
|
2017-07-04 00:52:40 -04:00
|
|
|
if (is_spi) {
|
2018-06-20 07:59:11 -04:00
|
|
|
sdmmc_flip_byte_order(spi_buf, sizeof(spi_buf));
|
2017-07-12 07:44:17 -04:00
|
|
|
ptr = spi_buf;
|
2017-07-04 00:52:40 -04:00
|
|
|
}
|
2018-06-20 07:59:11 -04:00
|
|
|
if (card->is_mmc) {
|
|
|
|
err = sdmmc_mmc_decode_csd(cmd.response, out_csd);
|
2018-05-09 13:12:00 -04:00
|
|
|
} else {
|
2018-06-20 07:59:11 -04:00
|
|
|
err = sdmmc_decode_csd(ptr, out_csd);
|
2018-05-09 13:12:00 -04:00
|
|
|
}
|
2018-06-20 07:59:11 -04:00
|
|
|
return err;
|
2016-12-19 09:19:47 -05:00
|
|
|
}
|
|
|
|
|
2018-06-20 07:59:11 -04:00
|
|
|
esp_err_t sdmmc_send_cmd_select_card(sdmmc_card_t* card, uint32_t rca)
|
2016-12-19 09:19:47 -05:00
|
|
|
{
|
2017-07-12 09:11:47 -04:00
|
|
|
/* Don't expect to see a response when de-selecting a card */
|
|
|
|
uint32_t response = (rca == 0) ? 0 : SCF_RSP_R1;
|
2016-12-19 09:19:47 -05:00
|
|
|
sdmmc_command_t cmd = {
|
|
|
|
.opcode = MMC_SELECT_CARD,
|
2017-07-12 09:11:47 -04:00
|
|
|
.arg = MMC_ARG_RCA(rca),
|
|
|
|
.flags = SCF_CMD_AC | response
|
2016-12-19 09:19:47 -05:00
|
|
|
};
|
|
|
|
return sdmmc_send_cmd(card, &cmd);
|
|
|
|
}
|
|
|
|
|
2018-06-20 07:59:11 -04:00
|
|
|
esp_err_t sdmmc_send_cmd_send_scr(sdmmc_card_t* card, sdmmc_scr_t *out_scr)
|
2016-12-19 09:19:47 -05:00
|
|
|
{
|
|
|
|
size_t datalen = 8;
|
2023-08-29 07:50:27 -04:00
|
|
|
esp_err_t err = ESP_FAIL;
|
2024-03-28 23:36:27 -04:00
|
|
|
void *buf = NULL;
|
2023-08-29 07:50:27 -04:00
|
|
|
size_t actual_size = 0;
|
2024-03-28 23:36:27 -04:00
|
|
|
esp_dma_mem_info_t dma_mem_info;
|
|
|
|
card->host.get_dma_info(card->host.slot, &dma_mem_info);
|
|
|
|
err = esp_dma_capable_malloc(datalen, &dma_mem_info, &buf, &actual_size);
|
2023-08-29 07:50:27 -04:00
|
|
|
if (err != ESP_OK) {
|
|
|
|
return err;
|
2016-12-19 09:19:47 -05:00
|
|
|
}
|
2023-08-29 07:50:27 -04:00
|
|
|
|
2016-12-19 09:19:47 -05:00
|
|
|
sdmmc_command_t cmd = {
|
|
|
|
.data = buf,
|
|
|
|
.datalen = datalen,
|
2023-08-29 07:50:27 -04:00
|
|
|
.buflen = actual_size,
|
2016-12-19 09:19:47 -05:00
|
|
|
.blklen = datalen,
|
|
|
|
.flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1,
|
|
|
|
.opcode = SD_APP_SEND_SCR
|
|
|
|
};
|
2023-08-29 07:50:27 -04:00
|
|
|
err = sdmmc_send_app_cmd(card, &cmd);
|
2016-12-19 09:19:47 -05:00
|
|
|
if (err == ESP_OK) {
|
|
|
|
err = sdmmc_decode_scr(buf, out_scr);
|
|
|
|
}
|
|
|
|
free(buf);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2018-06-20 07:59:11 -04:00
|
|
|
esp_err_t sdmmc_send_cmd_set_bus_width(sdmmc_card_t* card, int width)
|
2016-12-19 09:19:47 -05:00
|
|
|
{
|
|
|
|
sdmmc_command_t cmd = {
|
|
|
|
.opcode = SD_APP_SET_BUS_WIDTH,
|
|
|
|
.flags = SCF_RSP_R1 | SCF_CMD_AC,
|
2018-05-09 13:12:00 -04:00
|
|
|
.arg = (width == 4) ? SD_ARG_BUS_WIDTH_4 : SD_ARG_BUS_WIDTH_1,
|
2016-12-19 09:19:47 -05:00
|
|
|
};
|
|
|
|
|
|
|
|
return sdmmc_send_app_cmd(card, &cmd);
|
|
|
|
}
|
|
|
|
|
2018-06-20 07:59:11 -04:00
|
|
|
esp_err_t sdmmc_send_cmd_crc_on_off(sdmmc_card_t* card, bool crc_enable)
|
2017-07-04 00:52:40 -04:00
|
|
|
{
|
|
|
|
assert(host_is_spi(card) && "CRC_ON_OFF can only be used in SPI mode");
|
|
|
|
sdmmc_command_t cmd = {
|
|
|
|
.opcode = SD_CRC_ON_OFF,
|
|
|
|
.arg = crc_enable ? 1 : 0,
|
|
|
|
.flags = SCF_CMD_AC | SCF_RSP_R1
|
|
|
|
};
|
|
|
|
return sdmmc_send_cmd(card, &cmd);
|
|
|
|
}
|
|
|
|
|
2018-06-20 07:59:11 -04:00
|
|
|
esp_err_t sdmmc_send_cmd_send_status(sdmmc_card_t* card, uint32_t* out_status)
|
2016-12-19 09:19:47 -05:00
|
|
|
{
|
|
|
|
sdmmc_command_t cmd = {
|
|
|
|
.opcode = MMC_SEND_STATUS,
|
|
|
|
.arg = MMC_ARG_RCA(card->rca),
|
|
|
|
.flags = SCF_CMD_AC | SCF_RSP_R1
|
|
|
|
};
|
|
|
|
esp_err_t err = sdmmc_send_cmd(card, &cmd);
|
|
|
|
if (err != ESP_OK) {
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
if (out_status) {
|
2022-04-10 15:22:16 -04:00
|
|
|
if (host_is_spi(card)) {
|
|
|
|
*out_status = SD_SPI_R2(cmd.response);
|
|
|
|
} else {
|
|
|
|
*out_status = MMC_R1(cmd.response);
|
|
|
|
}
|
2016-12-19 09:19:47 -05:00
|
|
|
}
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t sdmmc_write_sectors(sdmmc_card_t* card, const void* src,
|
|
|
|
size_t start_block, size_t block_count)
|
2017-07-31 14:24:25 -04:00
|
|
|
{
|
2023-02-20 09:56:55 -05:00
|
|
|
if (block_count == 0) {
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2017-07-31 14:24:25 -04:00
|
|
|
esp_err_t err = ESP_OK;
|
|
|
|
size_t block_size = card->csd.sector_size;
|
2024-03-28 23:36:27 -04:00
|
|
|
esp_dma_mem_info_t dma_mem_info;
|
|
|
|
card->host.get_dma_info(card->host.slot, &dma_mem_info);
|
2024-04-04 11:04:01 -04:00
|
|
|
#ifdef SOC_SDMMC_PSRAM_DMA_CAPABLE
|
|
|
|
dma_mem_info.extra_heap_caps |= MALLOC_CAP_SPIRAM;
|
|
|
|
#endif
|
2024-03-28 23:36:27 -04:00
|
|
|
if (esp_dma_is_buffer_alignment_satisfied(src, block_size * block_count, dma_mem_info)) {
|
2023-08-29 07:50:27 -04:00
|
|
|
err = sdmmc_write_sectors_dma(card, src, start_block, block_count, block_size * block_count);
|
2017-07-31 14:24:25 -04:00
|
|
|
} else {
|
|
|
|
// SDMMC peripheral needs DMA-capable buffers. Split the write into
|
|
|
|
// separate single block writes, if needed, and allocate a temporary
|
|
|
|
// DMA-capable buffer.
|
2023-08-29 07:50:27 -04:00
|
|
|
void *tmp_buf = NULL;
|
|
|
|
size_t actual_size = 0;
|
2024-04-04 11:04:01 -04:00
|
|
|
// Clear the SPIRAM flag. We don't want to force the allocation into SPIRAM, the allocator
|
|
|
|
// will decide based on the buffer size and memory availability.
|
|
|
|
dma_mem_info.extra_heap_caps &= ~MALLOC_CAP_SPIRAM;
|
2024-01-24 00:28:15 -05:00
|
|
|
err = esp_dma_capable_malloc(block_size, &dma_mem_info, &tmp_buf, &actual_size);
|
2023-08-29 07:50:27 -04:00
|
|
|
if (err != ESP_OK) {
|
|
|
|
return err;
|
2017-07-31 14:24:25 -04:00
|
|
|
}
|
2023-08-29 07:50:27 -04:00
|
|
|
|
2017-07-31 14:24:25 -04:00
|
|
|
const uint8_t* cur_src = (const uint8_t*) src;
|
|
|
|
for (size_t i = 0; i < block_count; ++i) {
|
|
|
|
memcpy(tmp_buf, cur_src, block_size);
|
|
|
|
cur_src += block_size;
|
2023-08-29 07:50:27 -04:00
|
|
|
err = sdmmc_write_sectors_dma(card, tmp_buf, start_block + i, 1, actual_size);
|
2017-07-31 14:24:25 -04:00
|
|
|
if (err != ESP_OK) {
|
|
|
|
ESP_LOGD(TAG, "%s: error 0x%x writing block %d+%d",
|
|
|
|
__func__, err, start_block, i);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
free(tmp_buf);
|
|
|
|
}
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2018-06-20 07:59:11 -04:00
|
|
|
esp_err_t sdmmc_write_sectors_dma(sdmmc_card_t* card, const void* src,
|
2023-08-29 07:50:27 -04:00
|
|
|
size_t start_block, size_t block_count, size_t buffer_len)
|
2016-12-19 09:19:47 -05:00
|
|
|
{
|
|
|
|
if (start_block + block_count > card->csd.capacity) {
|
|
|
|
return ESP_ERR_INVALID_SIZE;
|
|
|
|
}
|
|
|
|
size_t block_size = card->csd.sector_size;
|
|
|
|
sdmmc_command_t cmd = {
|
|
|
|
.flags = SCF_CMD_ADTC | SCF_RSP_R1,
|
|
|
|
.blklen = block_size,
|
|
|
|
.data = (void*) src,
|
2017-10-12 20:16:07 -04:00
|
|
|
.datalen = block_count * block_size,
|
2023-08-29 07:50:27 -04:00
|
|
|
.buflen = buffer_len,
|
2017-10-12 20:16:07 -04:00
|
|
|
.timeout_ms = SDMMC_WRITE_CMD_TIMEOUT_MS
|
2016-12-19 09:19:47 -05:00
|
|
|
};
|
|
|
|
if (block_count == 1) {
|
|
|
|
cmd.opcode = MMC_WRITE_BLOCK_SINGLE;
|
|
|
|
} else {
|
|
|
|
cmd.opcode = MMC_WRITE_BLOCK_MULTIPLE;
|
|
|
|
}
|
|
|
|
if (card->ocr & SD_OCR_SDHC_CAP) {
|
|
|
|
cmd.arg = start_block;
|
|
|
|
} else {
|
|
|
|
cmd.arg = start_block * block_size;
|
|
|
|
}
|
|
|
|
esp_err_t err = sdmmc_send_cmd(card, &cmd);
|
|
|
|
if (err != ESP_OK) {
|
|
|
|
ESP_LOGE(TAG, "%s: sdmmc_send_cmd returned 0x%x", __func__, err);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
uint32_t status = 0;
|
|
|
|
size_t count = 0;
|
2023-05-15 18:16:52 -04:00
|
|
|
int64_t yield_delay_us = 100 * 1000; // initially 100ms
|
2023-01-18 18:22:07 -05:00
|
|
|
int64_t t0 = esp_timer_get_time();
|
2023-05-15 18:16:52 -04:00
|
|
|
int64_t t1 = 0;
|
2022-04-10 15:23:57 -04:00
|
|
|
/* SD mode: wait for the card to become idle based on R1 status */
|
2017-07-04 00:52:40 -04:00
|
|
|
while (!host_is_spi(card) && !(status & MMC_R1_READY_FOR_DATA)) {
|
2023-05-15 18:16:52 -04:00
|
|
|
t1 = esp_timer_get_time();
|
|
|
|
if (t1 - t0 > SDMMC_READY_FOR_DATA_TIMEOUT_US) {
|
2023-01-18 18:22:07 -05:00
|
|
|
ESP_LOGE(TAG, "write sectors dma - timeout");
|
|
|
|
return ESP_ERR_TIMEOUT;
|
|
|
|
}
|
2023-05-15 18:16:52 -04:00
|
|
|
if (t1 - t0 > yield_delay_us) {
|
|
|
|
yield_delay_us *= 2;
|
|
|
|
vTaskDelay(1);
|
|
|
|
}
|
2016-12-19 09:19:47 -05:00
|
|
|
err = sdmmc_send_cmd_send_status(card, &status);
|
|
|
|
if (err != ESP_OK) {
|
2023-01-18 18:22:07 -05:00
|
|
|
ESP_LOGE(TAG, "%s: sdmmc_send_cmd_send_status returned 0x%x", __func__, err);
|
2016-12-19 09:19:47 -05:00
|
|
|
return err;
|
|
|
|
}
|
2023-05-15 18:16:52 -04:00
|
|
|
if (++count % 16 == 0) {
|
2023-10-17 10:13:32 -04:00
|
|
|
ESP_LOGV(TAG, "waiting for card to become ready (%" PRIu32 ")", (uint32_t) count);
|
2016-12-19 09:19:47 -05:00
|
|
|
}
|
|
|
|
}
|
2022-04-10 15:23:57 -04:00
|
|
|
/* SPI mode: although card busy indication is based on the busy token,
|
|
|
|
* SD spec recommends that the host checks the results of programming by sending
|
|
|
|
* SEND_STATUS command. Some of the conditions reported in SEND_STATUS are not
|
|
|
|
* reported via a data error token.
|
|
|
|
*/
|
|
|
|
if (host_is_spi(card)) {
|
|
|
|
err = sdmmc_send_cmd_send_status(card, &status);
|
|
|
|
if (err != ESP_OK) {
|
2023-01-18 18:22:07 -05:00
|
|
|
ESP_LOGE(TAG, "%s: sdmmc_send_cmd_send_status returned 0x%x", __func__, err);
|
2022-04-10 15:23:57 -04:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
if (status & SD_SPI_R2_CARD_LOCKED) {
|
2023-10-17 10:13:32 -04:00
|
|
|
ESP_LOGE(TAG, "%s: write failed, card is locked: r2=0x%04" PRIx32,
|
2022-04-10 15:23:57 -04:00
|
|
|
__func__, status);
|
|
|
|
return ESP_ERR_INVALID_STATE;
|
|
|
|
}
|
|
|
|
if (status != 0) {
|
2023-10-17 10:13:32 -04:00
|
|
|
ESP_LOGE(TAG, "%s: card status indicates an error after write operation: r2=0x%04" PRIx32,
|
2022-04-10 15:23:57 -04:00
|
|
|
__func__, status);
|
|
|
|
return ESP_ERR_INVALID_RESPONSE;
|
|
|
|
}
|
|
|
|
}
|
2016-12-19 09:19:47 -05:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t sdmmc_read_sectors(sdmmc_card_t* card, void* dst,
|
|
|
|
size_t start_block, size_t block_count)
|
2017-07-31 14:24:25 -04:00
|
|
|
{
|
2023-02-20 09:56:55 -05:00
|
|
|
if (block_count == 0) {
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2017-07-31 14:24:25 -04:00
|
|
|
esp_err_t err = ESP_OK;
|
|
|
|
size_t block_size = card->csd.sector_size;
|
2024-03-28 23:36:27 -04:00
|
|
|
esp_dma_mem_info_t dma_mem_info;
|
|
|
|
card->host.get_dma_info(card->host.slot, &dma_mem_info);
|
|
|
|
if (esp_dma_is_buffer_alignment_satisfied(dst, block_size * block_count, dma_mem_info)) {
|
2023-08-29 07:50:27 -04:00
|
|
|
err = sdmmc_read_sectors_dma(card, dst, start_block, block_count, block_size * block_count);
|
2017-07-31 14:24:25 -04:00
|
|
|
} else {
|
|
|
|
// SDMMC peripheral needs DMA-capable buffers. Split the read into
|
|
|
|
// separate single block reads, if needed, and allocate a temporary
|
|
|
|
// DMA-capable buffer.
|
2023-08-29 07:50:27 -04:00
|
|
|
void *tmp_buf = NULL;
|
|
|
|
size_t actual_size = 0;
|
2024-01-24 00:28:15 -05:00
|
|
|
err = esp_dma_capable_malloc(block_size, &dma_mem_info, &tmp_buf, &actual_size);
|
2023-08-29 07:50:27 -04:00
|
|
|
if (err != ESP_OK) {
|
|
|
|
return err;
|
2017-07-31 14:24:25 -04:00
|
|
|
}
|
|
|
|
uint8_t* cur_dst = (uint8_t*) dst;
|
|
|
|
for (size_t i = 0; i < block_count; ++i) {
|
2023-08-29 07:50:27 -04:00
|
|
|
err = sdmmc_read_sectors_dma(card, tmp_buf, start_block + i, 1, actual_size);
|
2017-07-31 14:24:25 -04:00
|
|
|
if (err != ESP_OK) {
|
|
|
|
ESP_LOGD(TAG, "%s: error 0x%x writing block %d+%d",
|
|
|
|
__func__, err, start_block, i);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
memcpy(cur_dst, tmp_buf, block_size);
|
|
|
|
cur_dst += block_size;
|
|
|
|
}
|
|
|
|
free(tmp_buf);
|
|
|
|
}
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2018-06-20 07:59:11 -04:00
|
|
|
esp_err_t sdmmc_read_sectors_dma(sdmmc_card_t* card, void* dst,
|
2023-08-29 07:50:27 -04:00
|
|
|
size_t start_block, size_t block_count, size_t buffer_len)
|
2016-12-19 09:19:47 -05:00
|
|
|
{
|
|
|
|
if (start_block + block_count > card->csd.capacity) {
|
|
|
|
return ESP_ERR_INVALID_SIZE;
|
|
|
|
}
|
|
|
|
size_t block_size = card->csd.sector_size;
|
|
|
|
sdmmc_command_t cmd = {
|
|
|
|
.flags = SCF_CMD_ADTC | SCF_CMD_READ | SCF_RSP_R1,
|
|
|
|
.blklen = block_size,
|
|
|
|
.data = (void*) dst,
|
2023-08-29 07:50:27 -04:00
|
|
|
.datalen = block_count * block_size,
|
|
|
|
.buflen = buffer_len,
|
2016-12-19 09:19:47 -05:00
|
|
|
};
|
|
|
|
if (block_count == 1) {
|
|
|
|
cmd.opcode = MMC_READ_BLOCK_SINGLE;
|
|
|
|
} else {
|
|
|
|
cmd.opcode = MMC_READ_BLOCK_MULTIPLE;
|
|
|
|
}
|
|
|
|
if (card->ocr & SD_OCR_SDHC_CAP) {
|
|
|
|
cmd.arg = start_block;
|
|
|
|
} else {
|
|
|
|
cmd.arg = start_block * block_size;
|
|
|
|
}
|
|
|
|
esp_err_t err = sdmmc_send_cmd(card, &cmd);
|
|
|
|
if (err != ESP_OK) {
|
|
|
|
ESP_LOGE(TAG, "%s: sdmmc_send_cmd returned 0x%x", __func__, err);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
uint32_t status = 0;
|
|
|
|
size_t count = 0;
|
2023-05-15 18:16:52 -04:00
|
|
|
int64_t yield_delay_us = 100 * 1000; // initially 100ms
|
2023-01-18 18:22:07 -05:00
|
|
|
int64_t t0 = esp_timer_get_time();
|
2023-05-15 18:16:52 -04:00
|
|
|
int64_t t1 = 0;
|
|
|
|
/* SD mode: wait for the card to become idle based on R1 status */
|
2017-07-04 00:52:40 -04:00
|
|
|
while (!host_is_spi(card) && !(status & MMC_R1_READY_FOR_DATA)) {
|
2023-05-15 18:16:52 -04:00
|
|
|
t1 = esp_timer_get_time();
|
|
|
|
if (t1 - t0 > SDMMC_READY_FOR_DATA_TIMEOUT_US) {
|
2023-01-18 18:22:07 -05:00
|
|
|
ESP_LOGE(TAG, "read sectors dma - timeout");
|
|
|
|
return ESP_ERR_TIMEOUT;
|
|
|
|
}
|
2023-05-15 18:16:52 -04:00
|
|
|
if (t1 - t0 > yield_delay_us) {
|
|
|
|
yield_delay_us *= 2;
|
|
|
|
vTaskDelay(1);
|
|
|
|
}
|
2016-12-19 09:19:47 -05:00
|
|
|
err = sdmmc_send_cmd_send_status(card, &status);
|
|
|
|
if (err != ESP_OK) {
|
2023-01-18 18:22:07 -05:00
|
|
|
ESP_LOGE(TAG, "%s: sdmmc_send_cmd_send_status returned 0x%x", __func__, err);
|
2016-12-19 09:19:47 -05:00
|
|
|
return err;
|
|
|
|
}
|
2023-05-15 18:16:52 -04:00
|
|
|
if (++count % 16 == 0) {
|
2016-12-19 09:19:47 -05:00
|
|
|
ESP_LOGV(TAG, "waiting for card to become ready (%d)", count);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
2021-10-12 09:30:13 -04:00
|
|
|
|
2022-02-25 06:44:53 -05:00
|
|
|
esp_err_t sdmmc_erase_sectors(sdmmc_card_t* card, size_t start_sector,
|
|
|
|
size_t sector_count, sdmmc_erase_arg_t arg)
|
|
|
|
{
|
2023-02-20 09:56:55 -05:00
|
|
|
if (sector_count == 0) {
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2022-02-25 06:44:53 -05:00
|
|
|
if (start_sector + sector_count > card->csd.capacity) {
|
|
|
|
return ESP_ERR_INVALID_SIZE;
|
|
|
|
}
|
|
|
|
|
2022-04-05 07:13:31 -04:00
|
|
|
uint32_t cmd38_arg;
|
2022-02-25 06:44:53 -05:00
|
|
|
if (arg == SDMMC_ERASE_ARG) {
|
2022-04-05 07:13:31 -04:00
|
|
|
cmd38_arg = card->is_mmc ? SDMMC_MMC_TRIM_ARG : SDMMC_SD_ERASE_ARG;
|
2022-02-25 06:44:53 -05:00
|
|
|
} else {
|
2022-04-05 07:13:31 -04:00
|
|
|
cmd38_arg = card->is_mmc ? SDMMC_MMC_DISCARD_ARG : SDMMC_SD_DISCARD_ARG;
|
2022-02-25 06:44:53 -05:00
|
|
|
}
|
2022-04-05 07:13:31 -04:00
|
|
|
|
|
|
|
/* validate the CMD38 argument against card supported features */
|
|
|
|
if (card->is_mmc) {
|
|
|
|
if ((cmd38_arg == SDMMC_MMC_TRIM_ARG) && (sdmmc_can_trim(card) != ESP_OK)) {
|
|
|
|
return ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
if ((cmd38_arg == SDMMC_MMC_DISCARD_ARG) && (sdmmc_can_discard(card) != ESP_OK)) {
|
|
|
|
return ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
} else { // SD card
|
|
|
|
if ((cmd38_arg == SDMMC_SD_DISCARD_ARG) && (sdmmc_can_discard(card) != ESP_OK)) {
|
|
|
|
return ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
2022-02-25 06:44:53 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
/* default as block unit address */
|
|
|
|
size_t addr_unit_mult = 1;
|
|
|
|
|
|
|
|
if (!(card->ocr & SD_OCR_SDHC_CAP)) {
|
|
|
|
addr_unit_mult = card->csd.sector_size;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* prepare command to set the start address */
|
|
|
|
sdmmc_command_t cmd = {
|
|
|
|
.flags = SCF_CMD_AC | SCF_RSP_R1 | SCF_WAIT_BUSY,
|
|
|
|
.opcode = card->is_mmc ? MMC_ERASE_GROUP_START :
|
|
|
|
SD_ERASE_GROUP_START,
|
|
|
|
.arg = (start_sector * addr_unit_mult),
|
|
|
|
};
|
|
|
|
|
|
|
|
esp_err_t err = sdmmc_send_cmd(card, &cmd);
|
|
|
|
if (err != ESP_OK) {
|
2022-05-30 09:37:40 -04:00
|
|
|
ESP_LOGE(TAG, "%s: sdmmc_send_cmd (ERASE_GROUP_START) returned 0x%x", __func__, err);
|
2022-02-25 06:44:53 -05:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* prepare command to set the end address */
|
|
|
|
cmd.opcode = card->is_mmc ? MMC_ERASE_GROUP_END : SD_ERASE_GROUP_END;
|
|
|
|
cmd.arg = ((start_sector + (sector_count - 1)) * addr_unit_mult);
|
|
|
|
|
|
|
|
err = sdmmc_send_cmd(card, &cmd);
|
|
|
|
if (err != ESP_OK) {
|
2022-05-30 09:37:40 -04:00
|
|
|
ESP_LOGE(TAG, "%s: sdmmc_send_cmd (ERASE_GROUP_END) returned 0x%x", __func__, err);
|
2022-02-25 06:44:53 -05:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* issue erase command */
|
|
|
|
memset((void *)&cmd, 0 , sizeof(sdmmc_command_t));
|
|
|
|
cmd.flags = SCF_CMD_AC | SCF_RSP_R1B | SCF_WAIT_BUSY;
|
|
|
|
cmd.opcode = MMC_ERASE;
|
2022-04-05 07:13:31 -04:00
|
|
|
cmd.arg = cmd38_arg;
|
2022-05-30 09:37:40 -04:00
|
|
|
cmd.timeout_ms = sdmmc_get_erase_timeout_ms(card, cmd38_arg, sector_count * card->csd.sector_size / 1024);
|
2022-02-25 06:44:53 -05:00
|
|
|
|
|
|
|
err = sdmmc_send_cmd(card, &cmd);
|
|
|
|
if (err != ESP_OK) {
|
2022-05-30 09:37:40 -04:00
|
|
|
ESP_LOGE(TAG, "%s: sdmmc_send_cmd (ERASE) returned 0x%x", __func__, err);
|
2022-02-25 06:44:53 -05:00
|
|
|
return err;
|
|
|
|
}
|
2022-04-10 15:46:08 -04:00
|
|
|
|
|
|
|
if (host_is_spi(card)) {
|
|
|
|
uint32_t status;
|
|
|
|
err = sdmmc_send_cmd_send_status(card, &status);
|
|
|
|
if (err != ESP_OK) {
|
2023-01-18 18:22:07 -05:00
|
|
|
ESP_LOGE(TAG, "%s: sdmmc_send_cmd_send_status returned 0x%x", __func__, err);
|
2022-04-10 15:46:08 -04:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
if (status != 0) {
|
2023-10-17 10:13:32 -04:00
|
|
|
ESP_LOGE(TAG, "%s: card status indicates an error after erase operation: r2=0x%04" PRIx32,
|
2022-04-10 15:46:08 -04:00
|
|
|
__func__, status);
|
|
|
|
return ESP_ERR_INVALID_RESPONSE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-02-25 06:44:53 -05:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t sdmmc_can_discard(sdmmc_card_t* card)
|
|
|
|
{
|
|
|
|
if ((card->is_mmc) && (card->ext_csd.rev >= EXT_CSD_REV_1_6)) {
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
// SD card
|
2022-04-05 07:13:31 -04:00
|
|
|
if ((!card->is_mmc) && !host_is_spi(card) && (card->ssr.discard_support == 1)) {
|
2022-02-25 06:44:53 -05:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t sdmmc_can_trim(sdmmc_card_t* card)
|
|
|
|
{
|
|
|
|
if ((card->is_mmc) && (card->ext_csd.sec_feature & EXT_CSD_SEC_GB_CL_EN)) {
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t sdmmc_mmc_can_sanitize(sdmmc_card_t* card)
|
|
|
|
{
|
|
|
|
if ((card->is_mmc) && (card->ext_csd.sec_feature & EXT_CSD_SEC_SANITIZE)) {
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t sdmmc_mmc_sanitize(sdmmc_card_t* card, uint32_t timeout_ms)
|
|
|
|
{
|
|
|
|
esp_err_t err;
|
|
|
|
uint8_t index = EXT_CSD_SANITIZE_START;
|
|
|
|
uint8_t set = EXT_CSD_CMD_SET_NORMAL;
|
|
|
|
uint8_t value = 0x01;
|
|
|
|
|
|
|
|
if (sdmmc_mmc_can_sanitize(card) != ESP_OK) {
|
|
|
|
return ESP_ERR_NOT_SUPPORTED;
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* A Sanitize operation is initiated by writing a value to the extended
|
|
|
|
* CSD[165] SANITIZE_START. While the device is performing the sanitize
|
|
|
|
* operation, the busy line is asserted.
|
|
|
|
* SWITCH command is used to write the EXT_CSD register.
|
|
|
|
*/
|
|
|
|
sdmmc_command_t cmd = {
|
|
|
|
.opcode = MMC_SWITCH,
|
|
|
|
.arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | (index << 16) | (value << 8) | set,
|
|
|
|
.flags = SCF_RSP_R1B | SCF_CMD_AC | SCF_WAIT_BUSY,
|
|
|
|
.timeout_ms = timeout_ms,
|
|
|
|
};
|
|
|
|
err = sdmmc_send_cmd(card, &cmd);
|
|
|
|
if (err == ESP_OK) {
|
|
|
|
//check response bit to see that switch was accepted
|
|
|
|
if (MMC_R1(cmd.response) & MMC_R1_SWITCH_ERROR) {
|
|
|
|
err = ESP_ERR_INVALID_RESPONSE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t sdmmc_full_erase(sdmmc_card_t* card)
|
|
|
|
{
|
|
|
|
sdmmc_erase_arg_t arg = SDMMC_SD_ERASE_ARG; // erase by default for SD card
|
|
|
|
esp_err_t err;
|
|
|
|
if (card->is_mmc) {
|
|
|
|
arg = sdmmc_mmc_can_sanitize(card) == ESP_OK ? SDMMC_MMC_DISCARD_ARG: SDMMC_MMC_TRIM_ARG;
|
|
|
|
}
|
2022-05-30 09:37:40 -04:00
|
|
|
err = sdmmc_erase_sectors(card, 0, card->csd.capacity, arg);
|
2022-02-25 06:44:53 -05:00
|
|
|
if ((err == ESP_OK) && (arg == SDMMC_MMC_DISCARD_ARG)) {
|
2022-05-30 09:37:40 -04:00
|
|
|
uint32_t timeout_ms = sdmmc_get_erase_timeout_ms(card, SDMMC_MMC_DISCARD_ARG, card->csd.capacity * ((uint64_t) card->csd.sector_size) / 1024);
|
|
|
|
return sdmmc_mmc_sanitize(card, timeout_ms);
|
2022-02-25 06:44:53 -05:00
|
|
|
}
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2021-10-12 09:30:13 -04:00
|
|
|
esp_err_t sdmmc_get_status(sdmmc_card_t* card)
|
|
|
|
{
|
|
|
|
uint32_t stat;
|
|
|
|
return sdmmc_send_cmd_send_status(card, &stat);
|
|
|
|
}
|