added VerticalWritingDemo

VerticalWritingDemo/CMakeLists.txt

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+# The following lines of boilerplate have to be in your project's CMakeLists
+# in this exact order for cmake to work correctly
+cmake_minimum_required(VERSION 3.5)
+
+set(EXTRA_COMPONENT_DIRS ../components/ssd1306)
+
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(ssd1306)

VerticalWritingDemo/README.md

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+# VerticalWritingDemo for SSD1306
+
+![VerticalWritingDemo-1](https://github.com/user-attachments/assets/22aede1a-3fb3-4994-af52-0073a405377f)
+![VerticalWritingDemo-2](https://github.com/user-attachments/assets/910b00d0-161b-4c7f-80f6-fc4eb6a308e7)
+
+This demo is valid only for 128x64 panels.
+

VerticalWritingDemo/main/CMakeLists.txt

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+set(COMPONENT_SRCS "main.c")
+set(COMPONENT_ADD_INCLUDEDIRS "")
+
+register_component()

VerticalWritingDemo/main/component.mk

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+#
+# Main component makefile.
+#
+# This Makefile can be left empty. By default, it will take the sources in the 
+# src/ directory, compile them and link them into lib(subdirectory_name).a 
+# in the build directory. This behaviour is entirely configurable,
+# please read the ESP-IDF documents if you need to do this.
+#

VerticalWritingDemo/main/main.c

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+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "esp_log.h"
+
+#include "ssd1306.h"
+#include "font8x8_basic.h"
+
+/*
+ You have to set this config value with menuconfig
+ CONFIG_INTERFACE
+
+ for i2c
+ CONFIG_MODEL
+ CONFIG_SDA_GPIO
+ CONFIG_SCL_GPIO
+ CONFIG_RESET_GPIO
+
+ for SPI
+ CONFIG_CS_GPIO
+ CONFIG_DC_GPIO
+ CONFIG_RESET_GPIO
+*/
+
+#define tag "SSD1306"
+
+void app_main(void)
+{
+	SSD1306_t dev;
+	//int center, top, bottom;
+	//char lineChar[20];
+
+#if CONFIG_I2C_INTERFACE
+	ESP_LOGI(tag, "INTERFACE is i2c");
+	ESP_LOGI(tag, "CONFIG_SDA_GPIO=%d",CONFIG_SDA_GPIO);
+	ESP_LOGI(tag, "CONFIG_SCL_GPIO=%d",CONFIG_SCL_GPIO);
+	ESP_LOGI(tag, "CONFIG_RESET_GPIO=%d",CONFIG_RESET_GPIO);
+	i2c_master_init(&dev, CONFIG_SDA_GPIO, CONFIG_SCL_GPIO, CONFIG_RESET_GPIO);
+#endif // CONFIG_I2C_INTERFACE
+
+#if CONFIG_SPI_INTERFACE
+	ESP_LOGI(tag, "INTERFACE is SPI");
+	ESP_LOGI(tag, "CONFIG_MOSI_GPIO=%d",CONFIG_MOSI_GPIO);
+	ESP_LOGI(tag, "CONFIG_SCLK_GPIO=%d",CONFIG_SCLK_GPIO);
+	ESP_LOGI(tag, "CONFIG_CS_GPIO=%d",CONFIG_CS_GPIO);
+	ESP_LOGI(tag, "CONFIG_DC_GPIO=%d",CONFIG_DC_GPIO);
+	ESP_LOGI(tag, "CONFIG_RESET_GPIO=%d",CONFIG_RESET_GPIO);
+	spi_master_init(&dev, CONFIG_MOSI_GPIO, CONFIG_SCLK_GPIO, CONFIG_CS_GPIO, CONFIG_DC_GPIO, CONFIG_RESET_GPIO);
+#endif // CONFIG_SPI_INTERFACE
+
+#if CONFIG_FLIP
+	dev._flip = true;
+	ESP_LOGW(tag, "Flip upside down");
+#endif
+
+#if CONFIG_SSD1306_128x64
+	ESP_LOGI(tag, "Panel is 128x64");
+	ssd1306_init(&dev, 128, 64);
+#endif // CONFIG_SSD1306_128x64
+#if CONFIG_SSD1306_128x32
+	ESP_LOGE(TAG, "Panel is 128x32. This demo cannot be run.");
+	while(1) { vTaskDelay(1); }
+#endif // CONFIG_SSD1306_128x32
+
+	ssd1306_clear_screen(&dev, false);
+	ssd1306_contrast(&dev, 0xff);
+
+	char text[32];
+	for(int i=0;i<16;i++) {
+		int len = sprintf(text, "text %d", i);
+		ssd1306_display_rotate_text(&dev, i*8, text, len, false);
+	}
+	vTaskDelay(2000 / portTICK_PERIOD_MS);
+
+	for(int line=16;line<30;line++) {
+		for(int i=0;i<8;i++) {
+			ssd1306_wrap_arround(&dev, SCROLL_LEFT, 0, 7, -1);
+		}
+		int len = sprintf(text, "text %d", line);
+		ssd1306_display_rotate_text(&dev, 15*8, text, len, false);
+		ssd1306_show_buffer(&dev);
+		vTaskDelay(500 / portTICK_PERIOD_MS);
+	}
+
+	for(int i=0;i<16;i++) {
+		for(int i=0;i<8;i++) {
+			ssd1306_wrap_arround(&dev, SCROLL_LEFT, 0, 7, -1);
+		}
+		memset(text, 0x20, 8);
+		ssd1306_display_rotate_text(&dev, 15*8, text, 8, false);
+		ssd1306_show_buffer(&dev);
+		vTaskDelay(500 / portTICK_PERIOD_MS);
+	}
+}

VerticalWritingDemo/sdkconfig.defaults

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+#
+# ESP32-specific
+#
+CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y
+CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=240
+
+#
+# ESP32S2-specific
+#
+CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240=y
+CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ=240
+
+#
+# ESP32S3-specific
+#
+CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240=y
+CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ=240
+