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https://github.com/Matiasus/SSD1306.git
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179 lines
6.4 KiB
C
179 lines
6.4 KiB
C
/**
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* ---------------------------------------------------------------+
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* @desc Two Wire Interface / I2C Communication
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* ---------------------------------------------------------------+
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* Copyright (C) 2020 Marian Hrinko.
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* Written by Marian Hrinko (mato.hrinko@gmail.com)
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*
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* @author Marian Hrinko
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* @datum 06.09.2020
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* @file twi.h
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* @tested AVR Atmega16, ATmega8, Atmega328
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*
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* @depend
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* ---------------------------------------------------------------+
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* @usage Basic Master Transmit Operation
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*/
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#ifndef __TWI_H__
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#define __TWI_H__
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// define register for TWI communication
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// -------------------------------------------
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#if defined(__AVR_ATmega16__) || defined(__AVR_ATmega8__) || defined(__AVR_ATmega328P__)
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#define TWI_TWAR TWAR // TWI (Slave) Address Register
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#define TWI_TWBR TWBR // TWI Bit Rate Register
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#define TWI_TWDR TWDR // TWI Data Register
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#define TWI_TWCR TWCR // TWI Control Register
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#define TWI_TWSR TWSR // TWI Status Register
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#endif
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// Success
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// -------------------------------------------
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#ifndef SUCCESS
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#define SUCCESS 0
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#endif
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// Error
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// -------------------------------------------
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#ifndef ERROR
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#define ERROR 1
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#endif
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// ++++++++++++++++++++++++++++++++++++++++++
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//
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// M A S T E R M O D E
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//
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// ++++++++++++++++++++++++++++++++++++++++++
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// Master Mode - Transmitter / Receiver
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#define TWI_START_ACK 0x08 // A START condition has been transmitted
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#define TWI_REP_START_ACK 0x10 // A repeated START condition has been transmitted
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#define TWI_FLAG_ARB_LOST 0x38 // Arbitration lost in SLA+W or NOT ACK bit
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// Master Transmitter Mode
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#define TWI_MT_SLAW_ACK 0x18 // SLA+W has been transmitted; ACK has been received
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#define TWI_MT_SLAW_NACK 0x20 // SLA+W has been transmitted; NOT ACK has been received
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#define TWI_MT_DATA_ACK 0x28 // Data byte has been transmitted; ACK has been received
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#define TWI_MT_DATA_NACK 0x30 // Data byte has been transmitted; NOT ACK has been received
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// Master Receiver Mode
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#define TWI_MR_SLAR_ACK 0x40 // SLA+R has been transmitted; ACK has been received
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#define TWI_MR_SLAR_NACK 0x48 // SLA+R has been transmitted; NOT ACK has been received
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#define TWI_MR_DATA_ACK 0x50 // Data byte has been received; ACK has been received
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#define TWI_MR_DATA_NACK 0x58 // Data byte has been received; NOT ACK has been received
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// ++++++++++++++++++++++++++++++++++++++++++
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//
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// S L A V E M O D E
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//
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// ++++++++++++++++++++++++++++++++++++++++++
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// Slave Receiver Mode
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#define TWI_SR_SLAW_ACK 0x60 // Own Slave address has been received; ACK returned
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#define TWI_SR_ALMOA_ACK 0x68 // Arbitration Lost in SLA+R/W as Master; Own Slave address has been received; ACK returned
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#define TWI_SR_GCALL_ACK 0x70 // General call address has been received; ACK returned
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#define TWI_SR_ALMGA_ACK 0x78 // Arbitration lost in SLA+R/W as Master; General call address has been received; ACK returned
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#define TWI_SR_OA_DATA_ACK 0x80 // Previously addressed with own SLA+W; data has been received; ACK returned
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#define TWI_SR_OA_DATA_NACK 0x88 // Previously addressed with own SLA+W; data has been received; NOT ACK returned
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#define TWI_SR_GC_DATA_ACK 0x90 // Previously addressed with general call; data has been received; ACK returned
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#define TWI_SR_GC_DATA_NACK 0x98 // Previously addressed with general call; data has been received; NOT ACK returned
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#define TWI_SR_STOP_RSTART 0xA0 // A STOP condition or repeated START condition has been received while still addressed as Slave
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// Slave Transmitter Mode
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#define TWI_ST_OA_ACK 0xA8 // Own SLA+R has been received; ACK has been returned
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#define TWI_ST_ALMOA_ACK 0xB0 // Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been received
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#define TWI_ST_DATA_ACK 0xB8 // Data byte in TWDR has been transmitted; ACK has been received
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#define TWI_ST_DATA_NACK 0xC0 // Data byte in TWDR has been transmitted; NOT ACK has been received
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#define TWI_ST_DATA_LOST_ACK 0xC8 // Last data byte in TWDR has been transmitted (TWEA = '0'); ACK has been received
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// TWI CLK frequency
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// -------------------------------------------
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// @param TWBR
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// @param Prescaler
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// TWPS1 TWPS0 - PRESCALER
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// 0 0 - 1
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// 0 1 - 4
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// 1 0 - 16
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// 1 1 - 64
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#define TWI_FREQ(BIT_RATE, PRESCALER) { TWI_TWBR = BIT_RATE; TWI_TWSR |= (TWI_TWSR & 0x03) | PRESCALER; }
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// TWI start condition
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// -------------------------------------------
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// (1 << TWEN) - TWI Enable
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// (1 << TWINT) - TWI Interrupt Flag - must be cleared by set
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// (1 << TWSTA) - TWI Start
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#define TWI_START() { TWI_TWCR = (1 << TWEN) | (1 << TWINT) | (1 << TWSTA); }
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// TWI stop condition
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// -------------------------------------------
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// (1 << TWEN) - TWI Enable
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// (1 << TWINT) - TWI Interrupt Flag - must be cleared by set
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// (1 << TWSTO) - TWI Stop
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#define TWI_STOP() { TWI_TWCR = (1 << TWEN) | (1 << TWINT) | (1 << TWSTO); }
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// TWI enable
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// -------------------------------------------
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// (1 << TWEN) - TWI Enable
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// (1 << TWINT) - TWI Interrupt Flag - must be cleared by set
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#define TWI_ENABLE() { TWI_TWCR = (1 << TWEN) | (1 << TWINT); }
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// TWI test if TWINT Flag is set
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#define TWI_WAIT_TILL_TWINT_IS_SET() { while (!(TWI_TWCR & (1 << TWINT))); }
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// TWI status mask
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#define TWI_STATUS ( TWI_TWSR & 0xF8 )
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/**
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* @desc TWI init
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*
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* @param void
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*
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* @return void
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*/
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void TWI_Init (void);
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/**
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* @desc TWI MT Start
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*
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* @param void
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*
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* @return char
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*/
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char TWI_MT_Start (void);
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/**
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* @desc TWI Send SLAW
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*
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* @param void
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*
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* @return unsigned char
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*/
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char TWI_MT_Send_SLAW (char);
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/**
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* @desc TWI Send data
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*
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* @param char
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*
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* @return char
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*/
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char TWI_MT_Send_Data (char);
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/**
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* @desc TWI Send SLAR
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*
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* @param void
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*
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* @return unsigned char
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*/
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char TWI_MR_Send_SLAR (char);
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/**
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* @desc TWI stop
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*
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* @param void
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*
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* @return void
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*/
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void TWI_Stop (void);
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#endif
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