mirror of
https://github.com/alexandrebobkov/ESP-Nodes.git
synced 2024-10-05 20:47:50 -04:00
765 lines
34 KiB
C
765 lines
34 KiB
C
/*
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* Automatically generated file. DO NOT EDIT.
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* Espressif IoT Development Framework (ESP-IDF) 5.1.2 Configuration Header
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*/
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#pragma once
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#define CONFIG_SOC_BROWNOUT_RESET_SUPPORTED "Not determined"
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#define CONFIG_SOC_TWAI_BRP_DIV_SUPPORTED "Not determined"
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#define CONFIG_SOC_DPORT_WORKAROUND "Not determined"
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#define CONFIG_SOC_CAPS_ECO_VER_MAX 301
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#define CONFIG_SOC_ADC_SUPPORTED 1
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#define CONFIG_SOC_DAC_SUPPORTED 1
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#define CONFIG_SOC_UART_SUPPORTED 1
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#define CONFIG_SOC_MCPWM_SUPPORTED 1
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#define CONFIG_SOC_GPTIMER_SUPPORTED 1
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#define CONFIG_SOC_SDMMC_HOST_SUPPORTED 1
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#define CONFIG_SOC_BT_SUPPORTED 1
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#define CONFIG_SOC_PCNT_SUPPORTED 1
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#define CONFIG_SOC_WIFI_SUPPORTED 1
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#define CONFIG_SOC_SDIO_SLAVE_SUPPORTED 1
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#define CONFIG_SOC_TWAI_SUPPORTED 1
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#define CONFIG_SOC_EMAC_SUPPORTED 1
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#define CONFIG_SOC_ULP_SUPPORTED 1
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#define CONFIG_SOC_CCOMP_TIMER_SUPPORTED 1
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#define CONFIG_SOC_RTC_FAST_MEM_SUPPORTED 1
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#define CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED 1
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#define CONFIG_SOC_RTC_MEM_SUPPORTED 1
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#define CONFIG_SOC_I2S_SUPPORTED 1
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#define CONFIG_SOC_RMT_SUPPORTED 1
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#define CONFIG_SOC_SDM_SUPPORTED 1
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#define CONFIG_SOC_GPSPI_SUPPORTED 1
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#define CONFIG_SOC_LEDC_SUPPORTED 1
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#define CONFIG_SOC_I2C_SUPPORTED 1
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#define CONFIG_SOC_SUPPORT_COEXISTENCE 1
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#define CONFIG_SOC_AES_SUPPORTED 1
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#define CONFIG_SOC_MPI_SUPPORTED 1
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#define CONFIG_SOC_SHA_SUPPORTED 1
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#define CONFIG_SOC_FLASH_ENC_SUPPORTED 1
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#define CONFIG_SOC_SECURE_BOOT_SUPPORTED 1
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#define CONFIG_SOC_TOUCH_SENSOR_SUPPORTED 1
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#define CONFIG_SOC_BOD_SUPPORTED 1
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#define CONFIG_SOC_ULP_FSM_SUPPORTED 1
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#define CONFIG_SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL 5
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#define CONFIG_SOC_XTAL_SUPPORT_26M 1
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#define CONFIG_SOC_XTAL_SUPPORT_40M 1
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#define CONFIG_SOC_XTAL_SUPPORT_AUTO_DETECT 1
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#define CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED 1
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#define CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED 1
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#define CONFIG_SOC_ADC_DMA_SUPPORTED 1
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#define CONFIG_SOC_ADC_PERIPH_NUM 2
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#define CONFIG_SOC_ADC_MAX_CHANNEL_NUM 10
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#define CONFIG_SOC_ADC_ATTEN_NUM 4
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#define CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM 2
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#define CONFIG_SOC_ADC_PATT_LEN_MAX 16
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#define CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH 9
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#define CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH 12
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#define CONFIG_SOC_ADC_DIGI_RESULT_BYTES 2
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#define CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV 4
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#define CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH 2
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#define CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW 20
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#define CONFIG_SOC_ADC_RTC_MIN_BITWIDTH 9
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#define CONFIG_SOC_ADC_RTC_MAX_BITWIDTH 12
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#define CONFIG_SOC_SHARED_IDCACHE_SUPPORTED 1
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#define CONFIG_SOC_IDCACHE_PER_CORE 1
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#define CONFIG_SOC_CPU_CORES_NUM 2
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#define CONFIG_SOC_CPU_INTR_NUM 32
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#define CONFIG_SOC_CPU_HAS_FPU 1
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#define CONFIG_SOC_CPU_BREAKPOINTS_NUM 2
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#define CONFIG_SOC_CPU_WATCHPOINTS_NUM 2
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#define CONFIG_SOC_CPU_WATCHPOINT_SIZE 64
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#define CONFIG_SOC_DAC_CHAN_NUM 2
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#define CONFIG_SOC_DAC_RESOLUTION 8
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#define CONFIG_SOC_DAC_DMA_16BIT_ALIGN 1
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#define CONFIG_SOC_GPIO_PORT 1
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#define CONFIG_SOC_GPIO_PIN_COUNT 40
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#define CONFIG_SOC_GPIO_VALID_GPIO_MASK 0xFFFFFFFFFF
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#define CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0xEF0FEA
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#define CONFIG_SOC_I2C_NUM 2
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#define CONFIG_SOC_I2C_FIFO_LEN 32
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#define CONFIG_SOC_I2C_CMD_REG_NUM 16
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#define CONFIG_SOC_I2C_SUPPORT_SLAVE 1
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#define CONFIG_SOC_I2C_SUPPORT_APB 1
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#define CONFIG_SOC_I2S_NUM 2
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#define CONFIG_SOC_I2S_HW_VERSION_1 1
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#define CONFIG_SOC_I2S_SUPPORTS_APLL 1
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#define CONFIG_SOC_I2S_SUPPORTS_PLL_F160M 1
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#define CONFIG_SOC_I2S_SUPPORTS_PDM 1
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#define CONFIG_SOC_I2S_SUPPORTS_PDM_TX 1
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#define CONFIG_SOC_I2S_PDM_MAX_TX_LINES 1
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#define CONFIG_SOC_I2S_SUPPORTS_PDM_RX 1
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#define CONFIG_SOC_I2S_PDM_MAX_RX_LINES 1
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#define CONFIG_SOC_I2S_SUPPORTS_ADC_DAC 1
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#define CONFIG_SOC_I2S_SUPPORTS_ADC 1
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#define CONFIG_SOC_I2S_SUPPORTS_DAC 1
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#define CONFIG_SOC_I2S_SUPPORTS_LCD_CAMERA 1
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#define CONFIG_SOC_I2S_TRANS_SIZE_ALIGN_WORD 1
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#define CONFIG_SOC_I2S_LCD_I80_VARIANT 1
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#define CONFIG_SOC_LCD_I80_SUPPORTED 1
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#define CONFIG_SOC_LCD_I80_BUSES 2
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#define CONFIG_SOC_LCD_I80_BUS_WIDTH 24
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#define CONFIG_SOC_LEDC_HAS_TIMER_SPECIFIC_MUX 1
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#define CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK 1
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#define CONFIG_SOC_LEDC_SUPPORT_REF_TICK 1
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#define CONFIG_SOC_LEDC_SUPPORT_HS_MODE 1
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#define CONFIG_SOC_LEDC_CHANNEL_NUM 8
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#define CONFIG_SOC_LEDC_TIMER_BIT_WIDTH 20
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#define CONFIG_SOC_MCPWM_GROUPS 2
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#define CONFIG_SOC_MCPWM_TIMERS_PER_GROUP 3
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#define CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP 3
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#define CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR 2
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#define CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR 2
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#define CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR 2
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#define CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP 3
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#define CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP 1
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#define CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER 3
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#define CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP 3
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#define CONFIG_SOC_MMU_PERIPH_NUM 2
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#define CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM 3
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#define CONFIG_SOC_MPU_MIN_REGION_SIZE 0x20000000
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#define CONFIG_SOC_MPU_REGIONS_MAX_NUM 8
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#define CONFIG_SOC_PCNT_GROUPS 1
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#define CONFIG_SOC_PCNT_UNITS_PER_GROUP 8
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#define CONFIG_SOC_PCNT_CHANNELS_PER_UNIT 2
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#define CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT 2
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#define CONFIG_SOC_RMT_GROUPS 1
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#define CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP 8
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#define CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP 8
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#define CONFIG_SOC_RMT_CHANNELS_PER_GROUP 8
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#define CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL 64
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#define CONFIG_SOC_RMT_SUPPORT_REF_TICK 1
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#define CONFIG_SOC_RMT_SUPPORT_APB 1
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#define CONFIG_SOC_RMT_CHANNEL_CLK_INDEPENDENT 1
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#define CONFIG_SOC_RTCIO_PIN_COUNT 18
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#define CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED 1
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#define CONFIG_SOC_RTCIO_HOLD_SUPPORTED 1
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#define CONFIG_SOC_RTCIO_WAKE_SUPPORTED 1
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#define CONFIG_SOC_SDM_GROUPS 1
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#define CONFIG_SOC_SDM_CHANNELS_PER_GROUP 8
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#define CONFIG_SOC_SDM_CLK_SUPPORT_APB 1
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#define CONFIG_SOC_SPI_HD_BOTH_INOUT_SUPPORTED 1
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#define CONFIG_SOC_SPI_AS_CS_SUPPORTED 1
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#define CONFIG_SOC_SPI_PERIPH_NUM 3
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#define CONFIG_SOC_SPI_DMA_CHAN_NUM 2
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#define CONFIG_SOC_SPI_MAX_CS_NUM 3
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#define CONFIG_SOC_SPI_SUPPORT_CLK_APB 1
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#define CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE 64
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#define CONFIG_SOC_SPI_MAX_PRE_DIVIDER 8192
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#define CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1
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#define CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED 1
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#define CONFIG_SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED 1
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#define CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED 1
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#define CONFIG_SOC_TIMER_GROUPS 2
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#define CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP 2
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#define CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH 64
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#define CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS 4
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#define CONFIG_SOC_TIMER_GROUP_SUPPORT_APB 1
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#define CONFIG_SOC_TOUCH_VERSION_1 1
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#define CONFIG_SOC_TOUCH_SENSOR_NUM 10
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#define CONFIG_SOC_TOUCH_PAD_MEASURE_WAIT_MAX 0xFF
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#define CONFIG_SOC_TWAI_CONTROLLER_NUM 1
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#define CONFIG_SOC_TWAI_BRP_MIN 2
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#define CONFIG_SOC_TWAI_CLK_SUPPORT_APB 1
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#define CONFIG_SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT 1
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#define CONFIG_SOC_UART_NUM 3
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#define CONFIG_SOC_UART_SUPPORT_APB_CLK 1
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#define CONFIG_SOC_UART_SUPPORT_REF_TICK 1
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#define CONFIG_SOC_UART_FIFO_LEN 128
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#define CONFIG_SOC_UART_BITRATE_MAX 5000000
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#define CONFIG_SOC_SPIRAM_SUPPORTED 1
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#define CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE 1
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#define CONFIG_SOC_SHA_SUPPORT_PARALLEL_ENG 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA1 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA256 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA384 1
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#define CONFIG_SOC_SHA_SUPPORT_SHA512 1
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#define CONFIG_SOC_RSA_MAX_BIT_LEN 4096
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#define CONFIG_SOC_AES_SUPPORT_AES_128 1
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#define CONFIG_SOC_AES_SUPPORT_AES_192 1
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#define CONFIG_SOC_AES_SUPPORT_AES_256 1
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#define CONFIG_SOC_SECURE_BOOT_V1 1
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#define CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 1
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#define CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX 32
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#define CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE 21
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#define CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP 1
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#define CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP 1
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#define CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP 1
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#define CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP 1
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#define CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD 1
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#define CONFIG_SOC_PM_SUPPORT_RTC_FAST_MEM_PD 1
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#define CONFIG_SOC_PM_SUPPORT_RTC_SLOW_MEM_PD 1
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#define CONFIG_SOC_PM_SUPPORT_RC_FAST_PD 1
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#define CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD 1
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#define CONFIG_SOC_PM_SUPPORT_MODEM_PD 1
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#define CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED 1
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#define CONFIG_SOC_CLK_APLL_SUPPORTED 1
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#define CONFIG_SOC_APLL_MULTIPLIER_OUT_MIN_HZ 350000000
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#define CONFIG_SOC_APLL_MULTIPLIER_OUT_MAX_HZ 500000000
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#define CONFIG_SOC_APLL_MIN_HZ 5303031
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#define CONFIG_SOC_APLL_MAX_HZ 125000000
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#define CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED 1
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#define CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 1
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#define CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION 1
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#define CONFIG_SOC_CLK_XTAL32K_SUPPORTED 1
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#define CONFIG_SOC_SDMMC_USE_IOMUX 1
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#define CONFIG_SOC_SDMMC_NUM_SLOTS 2
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#define CONFIG_SOC_WIFI_WAPI_SUPPORT 1
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#define CONFIG_SOC_WIFI_CSI_SUPPORT 1
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#define CONFIG_SOC_WIFI_MESH_SUPPORT 1
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#define CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW 1
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#define CONFIG_SOC_WIFI_NAN_SUPPORT 1
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#define CONFIG_SOC_BLE_SUPPORTED 1
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#define CONFIG_SOC_BLE_MESH_SUPPORTED 1
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#define CONFIG_SOC_BT_CLASSIC_SUPPORTED 1
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#define CONFIG_SOC_BLUFI_SUPPORTED 1
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#define CONFIG_SOC_ULP_HAS_ADC 1
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#define CONFIG_SOC_PHY_COMBO_MODULE 1
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#define CONFIG_IDF_CMAKE 1
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#define CONFIG_IDF_TARGET_ARCH_XTENSA 1
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#define CONFIG_IDF_TARGET_ARCH "xtensa"
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#define CONFIG_IDF_TARGET "esp32"
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#define CONFIG_IDF_TARGET_ESP32 1
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#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0000
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#define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1
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#define CONFIG_APP_BUILD_GENERATE_BINARIES 1
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#define CONFIG_APP_BUILD_BOOTLOADER 1
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#define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1
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#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x1000
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#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
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#define CONFIG_BOOTLOADER_LOG_LEVEL_INFO 1
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#define CONFIG_BOOTLOADER_LOG_LEVEL 3
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#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
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#define CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE 1
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#define CONFIG_BOOTLOADER_WDT_ENABLE 1
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#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
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#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x0
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#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
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#define CONFIG_SECURE_BOOT_V1_SUPPORTED 1
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#define CONFIG_APP_COMPILE_TIME_DATE 1
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#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 16
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#define CONFIG_ESP_ROM_HAS_CRC_LE 1
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#define CONFIG_ESP_ROM_HAS_CRC_BE 1
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#define CONFIG_ESP_ROM_HAS_MZ_CRC32 1
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#define CONFIG_ESP_ROM_HAS_JPEG_DECODE 1
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#define CONFIG_ESP_ROM_HAS_UART_BUF_SWITCH 1
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#define CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND 1
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#define CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT 1
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#define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1
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#define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
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#define CONFIG_ESPTOOLPY_FLASHMODE "dio"
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#define CONFIG_ESPTOOLPY_FLASHFREQ_40M 1
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#define CONFIG_ESPTOOLPY_FLASHFREQ "40m"
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#define CONFIG_ESPTOOLPY_FLASHSIZE_2MB 1
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#define CONFIG_ESPTOOLPY_FLASHSIZE "2MB"
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#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
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#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
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#define CONFIG_ESPTOOLPY_AFTER_RESET 1
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#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
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#define CONFIG_ESPTOOLPY_MONITOR_BAUD 115200
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#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
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#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
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#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
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#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
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#define CONFIG_PARTITION_TABLE_MD5 1
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#define CONFIG_ENV_GPIO_RANGE_MIN 0
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#define CONFIG_ENV_GPIO_RANGE_MAX 39
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#define CONFIG_ENV_GPIO_IN_RANGE_MAX 39
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#define CONFIG_ENV_GPIO_OUT_RANGE_MAX 33
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#define CONFIG_BLINK_LED_GPIO 1
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#define CONFIG_BLINK_GPIO 5
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#define CONFIG_BLINK_PERIOD 1000
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#define CONFIG_COMPILER_OPTIMIZATION_DEFAULT 1
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#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
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#define CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB 1
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#define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
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#define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
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#define CONFIG_COMPILER_STACK_CHECK_MODE_NONE 1
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#define CONFIG_APPTRACE_DEST_NONE 1
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#define CONFIG_APPTRACE_DEST_UART_NONE 1
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#define CONFIG_APPTRACE_UART_TASK_PRIO 1
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#define CONFIG_APPTRACE_LOCK_ENABLE 1
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#define CONFIG_ADC_DISABLE_DAC 1
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#define CONFIG_ADC_CAL_EFUSE_TP_ENABLE 1
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#define CONFIG_ADC_CAL_EFUSE_VREF_ENABLE 1
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#define CONFIG_ADC_CAL_LUT_ENABLE 1
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#define CONFIG_SPI_MASTER_ISR_IN_IRAM 1
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#define CONFIG_SPI_SLAVE_ISR_IN_IRAM 1
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#define CONFIG_TWAI_ERRATA_FIX_BUS_OFF_REC 1
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#define CONFIG_TWAI_ERRATA_FIX_TX_INTR_LOST 1
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#define CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID 1
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#define CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT 1
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#define CONFIG_TWAI_ERRATA_FIX_LISTEN_ONLY_DOM 1
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#define CONFIG_GPTIMER_ISR_HANDLER_IN_IRAM 1
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#define CONFIG_DAC_DMA_AUTO_16BIT_ALIGN 1
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#define CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4 1
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#define CONFIG_EFUSE_MAX_BLK_LEN 192
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#define CONFIG_ESP_TLS_USING_MBEDTLS 1
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#define CONFIG_ADC_CALI_EFUSE_TP_ENABLE 1
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#define CONFIG_ADC_CALI_EFUSE_VREF_ENABLE 1
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#define CONFIG_ADC_CALI_LUT_ENABLE 1
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#define CONFIG_ADC_DISABLE_DAC_OUTPUT 1
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#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
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#define CONFIG_ETH_ENABLED 1
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#define CONFIG_ETH_USE_ESP32_EMAC 1
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#define CONFIG_ETH_PHY_INTERFACE_RMII 1
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#define CONFIG_ETH_RMII_CLK_INPUT 1
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#define CONFIG_ETH_RMII_CLK_IN_GPIO 0
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#define CONFIG_ETH_DMA_BUFFER_SIZE 512
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#define CONFIG_ETH_DMA_RX_BUFFER_NUM 10
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#define CONFIG_ETH_DMA_TX_BUFFER_NUM 10
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#define CONFIG_ETH_USE_SPI_ETHERNET 1
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#define CONFIG_ESP_EVENT_POST_FROM_ISR 1
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#define CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR 1
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#define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
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#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 512
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#define CONFIG_HTTPD_MAX_URI_LEN 512
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#define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
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#define CONFIG_HTTPD_PURGE_BUF_LEN 32
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#define CONFIG_ESP32_REV_MIN_0 1
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#define CONFIG_ESP32_REV_MIN 0
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#define CONFIG_ESP32_REV_MIN_FULL 0
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#define CONFIG_ESP_REV_MIN_FULL 0
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#define CONFIG_ESP32_REV_MAX_FULL 399
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#define CONFIG_ESP_REV_MAX_FULL 399
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#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA 1
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#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP 1
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#define CONFIG_ESP_MAC_ADDR_UNIVERSE_BT 1
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#define CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH 1
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#define CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR 1
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#define CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR 1
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#define CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES 4
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#define CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND 1
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#define CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND 1
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#define CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY 2000
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#define CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS 1
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#define CONFIG_RTC_CLK_SRC_INT_RC 1
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#define CONFIG_RTC_CLK_CAL_CYCLES 1024
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#define CONFIG_PERIPH_CTRL_FUNC_IN_IRAM 1
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#define CONFIG_XTAL_FREQ_40 1
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#define CONFIG_XTAL_FREQ 40
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#define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE 32
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#define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
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#define CONFIG_ESP_NETIF_TCPIP_LWIP 1
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#define CONFIG_ESP_NETIF_USES_TCPIP_WITH_BSD_API 1
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#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
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#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
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#define CONFIG_ESP_PHY_MAX_TX_POWER 20
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#define CONFIG_ESP_PHY_RF_CAL_PARTIAL 1
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#define CONFIG_ESP_PHY_CALIBRATION_MODE 0
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#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160 1
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#define CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ 160
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#define CONFIG_ESP32_TRACEMEM_RESERVE_DRAM 0x0
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#define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
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#define CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS 0
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#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
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#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2304
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#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 3584
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#define CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 1
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#define CONFIG_ESP_MAIN_TASK_AFFINITY 0x0
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#define CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE 2048
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#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
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#define CONFIG_ESP_CONSOLE_UART 1
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#define CONFIG_ESP_CONSOLE_MULTIPLE_UART 1
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#define CONFIG_ESP_CONSOLE_UART_NUM 0
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#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
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#define CONFIG_ESP_INT_WDT 1
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#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 300
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#define CONFIG_ESP_INT_WDT_CHECK_CPU1 1
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#define CONFIG_ESP_TASK_WDT_EN 1
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#define CONFIG_ESP_TASK_WDT_INIT 1
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#define CONFIG_ESP_TASK_WDT_TIMEOUT_S 5
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#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
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#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 1
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#define CONFIG_ESP_DEBUG_OCDAWARE 1
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#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
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#define CONFIG_ESP_BROWNOUT_DET 1
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#define CONFIG_ESP_BROWNOUT_DET_LVL_SEL_0 1
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#define CONFIG_ESP_BROWNOUT_DET_LVL 0
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#define CONFIG_ESP_SYSTEM_BROWNOUT_INTR 1
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#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
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#define CONFIG_ESP_IPC_USES_CALLERS_PRIORITY 1
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#define CONFIG_ESP_IPC_ISR_ENABLE 1
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#define CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER 1
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#define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1
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#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 3584
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#define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1
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#define CONFIG_ESP_TIMER_TASK_AFFINITY 0x0
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#define CONFIG_ESP_TIMER_TASK_AFFINITY_CPU0 1
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#define CONFIG_ESP_TIMER_ISR_AFFINITY 0x1
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#define CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0 1
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#define CONFIG_ESP_TIMER_IMPL_TG0_LAC 1
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#define CONFIG_ESP_WIFI_ENABLED 1
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#define CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM 10
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#define CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM 32
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#define CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER 1
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#define CONFIG_ESP_WIFI_TX_BUFFER_TYPE 1
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#define CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM 32
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#define CONFIG_ESP_WIFI_STATIC_RX_MGMT_BUFFER 1
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#define CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUF 0
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#define CONFIG_ESP_WIFI_RX_MGMT_BUF_NUM_DEF 5
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#define CONFIG_ESP_WIFI_AMPDU_TX_ENABLED 1
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#define CONFIG_ESP_WIFI_TX_BA_WIN 6
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#define CONFIG_ESP_WIFI_AMPDU_RX_ENABLED 1
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#define CONFIG_ESP_WIFI_RX_BA_WIN 6
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#define CONFIG_ESP_WIFI_NVS_ENABLED 1
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|
#define CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0 1
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#define CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN 752
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#define CONFIG_ESP_WIFI_MGMT_SBUF_NUM 32
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#define CONFIG_ESP_WIFI_IRAM_OPT 1
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|
#define CONFIG_ESP_WIFI_RX_IRAM_OPT 1
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|
#define CONFIG_ESP_WIFI_ENABLE_WPA3_SAE 1
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|
#define CONFIG_ESP_WIFI_ENABLE_SAE_PK 1
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|
#define CONFIG_ESP_WIFI_SOFTAP_SAE_SUPPORT 1
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|
#define CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA 1
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|
#define CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE 1
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|
#define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1
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|
#define CONFIG_ESP_WIFI_ESPNOW_MAX_ENCRYPT_NUM 7
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|
#define CONFIG_ESP_WIFI_MBEDTLS_CRYPTO 1
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|
#define CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT 1
|
|
#define CONFIG_ESP_WIFI_ENTERPRISE_SUPPORT 1
|
|
#define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
|
|
#define CONFIG_FATFS_VOLUME_COUNT 2
|
|
#define CONFIG_FATFS_LFN_NONE 1
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|
#define CONFIG_FATFS_SECTOR_4096 1
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|
#define CONFIG_FATFS_CODEPAGE_437 1
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|
#define CONFIG_FATFS_CODEPAGE 437
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|
#define CONFIG_FATFS_FS_LOCK 0
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|
#define CONFIG_FATFS_TIMEOUT_MS 10000
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|
#define CONFIG_FATFS_PER_FILE_CACHE 1
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|
#define CONFIG_FATFS_VFS_FSTAT_BLKSIZE 0
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|
#define CONFIG_FREERTOS_HZ 100
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|
#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
|
|
#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
|
|
#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 1536
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|
#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
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|
#define CONFIG_FREERTOS_TIMER_TASK_PRIORITY 1
|
|
#define CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH 2048
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|
#define CONFIG_FREERTOS_TIMER_QUEUE_LENGTH 10
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|
#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
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|
#define CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES 1
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|
#define CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER 1
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|
#define CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS 1
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|
#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
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|
#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
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|
#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
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|
#define CONFIG_FREERTOS_TICK_SUPPORT_CORETIMER 1
|
|
#define CONFIG_FREERTOS_CORETIMER_0 1
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|
#define CONFIG_FREERTOS_SYSTICK_USES_CCOUNT 1
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|
#define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
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|
#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
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|
#define CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION 1
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|
#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
|
|
#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
|
|
#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
|
|
#define CONFIG_HAL_SPI_MASTER_FUNC_IN_IRAM 1
|
|
#define CONFIG_HAL_SPI_SLAVE_FUNC_IN_IRAM 1
|
|
#define CONFIG_HEAP_POISONING_DISABLED 1
|
|
#define CONFIG_HEAP_TRACING_OFF 1
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|
#define CONFIG_IEEE802154_CCA_THRESHOLD -60
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|
#define CONFIG_IEEE802154_PENDING_TABLE_SIZE 20
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|
#define CONFIG_LOG_DEFAULT_LEVEL_INFO 1
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|
#define CONFIG_LOG_DEFAULT_LEVEL 3
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|
#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
|
|
#define CONFIG_LOG_MAXIMUM_LEVEL 3
|
|
#define CONFIG_LOG_COLORS 1
|
|
#define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
|
|
#define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
|
|
#define CONFIG_LWIP_TCPIP_TASK_PRIO 18
|
|
#define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
|
|
#define CONFIG_LWIP_TIMERS_ONDEMAND 1
|
|
#define CONFIG_LWIP_ND6 1
|
|
#define CONFIG_LWIP_MAX_SOCKETS 10
|
|
#define CONFIG_LWIP_SO_REUSE 1
|
|
#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
|
|
#define CONFIG_LWIP_IP4_FRAG 1
|
|
#define CONFIG_LWIP_IP6_FRAG 1
|
|
#define CONFIG_LWIP_IP_REASS_MAX_PBUFS 10
|
|
#define CONFIG_LWIP_ESP_GRATUITOUS_ARP 1
|
|
#define CONFIG_LWIP_GARP_TMR_INTERVAL 60
|
|
#define CONFIG_LWIP_ESP_MLDV6_REPORT 1
|
|
#define CONFIG_LWIP_MLDV6_TMR_INTERVAL 40
|
|
#define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
|
|
#define CONFIG_LWIP_DHCP_DOES_ARP_CHECK 1
|
|
#define CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID 1
|
|
#define CONFIG_LWIP_DHCP_OPTIONS_LEN 68
|
|
#define CONFIG_LWIP_NUM_NETIF_CLIENT_DATA 0
|
|
#define CONFIG_LWIP_DHCP_COARSE_TIMER_SECS 1
|
|
#define CONFIG_LWIP_DHCPS 1
|
|
#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
|
|
#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
|
|
#define CONFIG_LWIP_IPV4 1
|
|
#define CONFIG_LWIP_IPV6 1
|
|
#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
|
|
#define CONFIG_LWIP_NETIF_LOOPBACK 1
|
|
#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
|
|
#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
|
|
#define CONFIG_LWIP_MAX_LISTENING_TCP 16
|
|
#define CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION 1
|
|
#define CONFIG_LWIP_TCP_MAXRTX 12
|
|
#define CONFIG_LWIP_TCP_SYNMAXRTX 12
|
|
#define CONFIG_LWIP_TCP_MSS 1440
|
|
#define CONFIG_LWIP_TCP_TMR_INTERVAL 250
|
|
#define CONFIG_LWIP_TCP_MSL 60000
|
|
#define CONFIG_LWIP_TCP_FIN_WAIT_TIMEOUT 20000
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|
#define CONFIG_LWIP_TCP_SND_BUF_DEFAULT 5744
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|
#define CONFIG_LWIP_TCP_WND_DEFAULT 5744
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|
#define CONFIG_LWIP_TCP_RECVMBOX_SIZE 6
|
|
#define CONFIG_LWIP_TCP_QUEUE_OOSEQ 1
|
|
#define CONFIG_LWIP_TCP_OVERSIZE_MSS 1
|
|
#define CONFIG_LWIP_TCP_RTO_TIME 1500
|
|
#define CONFIG_LWIP_MAX_UDP_PCBS 16
|
|
#define CONFIG_LWIP_UDP_RECVMBOX_SIZE 6
|
|
#define CONFIG_LWIP_CHECKSUM_CHECK_ICMP 1
|
|
#define CONFIG_LWIP_TCPIP_TASK_STACK_SIZE 3072
|
|
#define CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY 1
|
|
#define CONFIG_LWIP_TCPIP_TASK_AFFINITY 0x7FFFFFFF
|
|
#define CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE 3
|
|
#define CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS 5
|
|
#define CONFIG_LWIP_ICMP 1
|
|
#define CONFIG_LWIP_MAX_RAW_PCBS 16
|
|
#define CONFIG_LWIP_SNTP_MAX_SERVERS 1
|
|
#define CONFIG_LWIP_SNTP_UPDATE_DELAY 3600000
|
|
#define CONFIG_LWIP_BRIDGEIF_MAX_PORTS 7
|
|
#define CONFIG_LWIP_ESP_LWIP_ASSERT 1
|
|
#define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
|
|
#define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
|
|
#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
|
|
#define CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_NONE 1
|
|
#define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
|
|
#define CONFIG_LWIP_HOOK_IP6_INPUT_NONE 1
|
|
#define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
|
|
#define CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN 1
|
|
#define CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN 16384
|
|
#define CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN 4096
|
|
#define CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE 1
|
|
#define CONFIG_MBEDTLS_PKCS7_C 1
|
|
#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
|
|
#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
|
|
#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS 200
|
|
#define CONFIG_MBEDTLS_CMAC_C 1
|
|
#define CONFIG_MBEDTLS_HARDWARE_AES 1
|
|
#define CONFIG_MBEDTLS_HARDWARE_MPI 1
|
|
#define CONFIG_MBEDTLS_HARDWARE_SHA 1
|
|
#define CONFIG_MBEDTLS_ROM_MD5 1
|
|
#define CONFIG_MBEDTLS_HAVE_TIME 1
|
|
#define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
|
|
#define CONFIG_MBEDTLS_SHA512_C 1
|
|
#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
|
|
#define CONFIG_MBEDTLS_TLS_SERVER 1
|
|
#define CONFIG_MBEDTLS_TLS_CLIENT 1
|
|
#define CONFIG_MBEDTLS_TLS_ENABLED 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
|
|
#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
|
|
#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
|
|
#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
|
|
#define CONFIG_MBEDTLS_SSL_ALPN 1
|
|
#define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
|
|
#define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
|
|
#define CONFIG_MBEDTLS_AES_C 1
|
|
#define CONFIG_MBEDTLS_CCM_C 1
|
|
#define CONFIG_MBEDTLS_GCM_C 1
|
|
#define CONFIG_MBEDTLS_PEM_PARSE_C 1
|
|
#define CONFIG_MBEDTLS_PEM_WRITE_C 1
|
|
#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
|
|
#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
|
|
#define CONFIG_MBEDTLS_ECP_C 1
|
|
#define CONFIG_MBEDTLS_ECDH_C 1
|
|
#define CONFIG_MBEDTLS_ECDSA_C 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
|
|
#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
|
|
#define CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM 1
|
|
#define CONFIG_MQTT_PROTOCOL_311 1
|
|
#define CONFIG_MQTT_TRANSPORT_SSL 1
|
|
#define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
|
|
#define CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE 1
|
|
#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
|
|
#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
|
|
#define CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT 1
|
|
#define CONFIG_OPENTHREAD_NETWORK_NAME "OpenThread-ESP"
|
|
#define CONFIG_OPENTHREAD_MESH_LOCAL_PREFIX "fd00:db8:a0:0::/64"
|
|
#define CONFIG_OPENTHREAD_NETWORK_CHANNEL 15
|
|
#define CONFIG_OPENTHREAD_NETWORK_PANID 0x1234
|
|
#define CONFIG_OPENTHREAD_NETWORK_EXTPANID "dead00beef00cafe"
|
|
#define CONFIG_OPENTHREAD_NETWORK_MASTERKEY "00112233445566778899aabbccddeeff"
|
|
#define CONFIG_OPENTHREAD_NETWORK_PSKC "104810e2315100afd6bc9215a6bfac53"
|
|
#define CONFIG_OPENTHREAD_XTAL_ACCURACY 130
|
|
#define CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_0 1
|
|
#define CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_1 1
|
|
#define CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_2 1
|
|
#define CONFIG_PTHREAD_TASK_PRIO_DEFAULT 5
|
|
#define CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT 3072
|
|
#define CONFIG_PTHREAD_STACK_MIN 768
|
|
#define CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY 1
|
|
#define CONFIG_PTHREAD_TASK_CORE_DEFAULT -1
|
|
#define CONFIG_PTHREAD_TASK_NAME_DEFAULT "pthread"
|
|
#define CONFIG_MMU_PAGE_SIZE_64KB 1
|
|
#define CONFIG_MMU_PAGE_MODE "64KB"
|
|
#define CONFIG_MMU_PAGE_SIZE 0x10000
|
|
#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
|
|
#define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1
|
|
#define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1
|
|
#define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 20
|
|
#define CONFIG_SPI_FLASH_ERASE_YIELD_TICKS 1
|
|
#define CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE 8192
|
|
#define CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC 1
|
|
#define CONFIG_SPI_FLASH_BROWNOUT_RESET 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_GD_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORTED 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
|
|
#define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
|
|
#define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
|
|
#define CONFIG_SPIFFS_MAX_PARTITIONS 3
|
|
#define CONFIG_SPIFFS_CACHE 1
|
|
#define CONFIG_SPIFFS_CACHE_WR 1
|
|
#define CONFIG_SPIFFS_PAGE_CHECK 1
|
|
#define CONFIG_SPIFFS_GC_MAX_RUNS 10
|
|
#define CONFIG_SPIFFS_PAGE_SIZE 256
|
|
#define CONFIG_SPIFFS_OBJ_NAME_LEN 32
|
|
#define CONFIG_SPIFFS_USE_MAGIC 1
|
|
#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
|
|
#define CONFIG_SPIFFS_META_LENGTH 4
|
|
#define CONFIG_SPIFFS_USE_MTIME 1
|
|
#define CONFIG_WS_TRANSPORT 1
|
|
#define CONFIG_WS_BUFFER_SIZE 1024
|
|
#define CONFIG_UNITY_ENABLE_FLOAT 1
|
|
#define CONFIG_UNITY_ENABLE_DOUBLE 1
|
|
#define CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER 1
|
|
#define CONFIG_VFS_SUPPORT_IO 1
|
|
#define CONFIG_VFS_SUPPORT_DIR 1
|
|
#define CONFIG_VFS_SUPPORT_SELECT 1
|
|
#define CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT 1
|
|
#define CONFIG_VFS_SUPPORT_TERMIOS 1
|
|
#define CONFIG_VFS_MAX_COUNT 8
|
|
#define CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS 1
|
|
#define CONFIG_WL_SECTOR_SIZE_4096 1
|
|
#define CONFIG_WL_SECTOR_SIZE 4096
|
|
#define CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES 16
|
|
#define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
|
|
#define CONFIG_WIFI_PROV_STA_ALL_CHANNEL_SCAN 1
|
|
|
|
/* List of deprecated options */
|
|
#define CONFIG_ADC2_DISABLE_DAC CONFIG_ADC_DISABLE_DAC
|
|
#define CONFIG_BROWNOUT_DET CONFIG_ESP_BROWNOUT_DET
|
|
#define CONFIG_BROWNOUT_DET_LVL CONFIG_ESP_BROWNOUT_DET_LVL
|
|
#define CONFIG_BROWNOUT_DET_LVL_SEL_0 CONFIG_ESP_BROWNOUT_DET_LVL_SEL_0
|
|
#define CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG CONFIG_COMPILER_OPTIMIZATION_DEFAULT
|
|
#define CONFIG_CONSOLE_UART CONFIG_ESP_CONSOLE_UART
|
|
#define CONFIG_CONSOLE_UART_BAUDRATE CONFIG_ESP_CONSOLE_UART_BAUDRATE
|
|
#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
|
|
#define CONFIG_CONSOLE_UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
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#define CONFIG_ESP32_APPTRACE_DEST_NONE CONFIG_APPTRACE_DEST_NONE
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#define CONFIG_ESP32_APPTRACE_LOCK_ENABLE CONFIG_APPTRACE_LOCK_ENABLE
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#define CONFIG_ESP32_BROWNOUT_DET CONFIG_ESP_BROWNOUT_DET
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#define CONFIG_ESP32_BROWNOUT_DET_LVL CONFIG_ESP_BROWNOUT_DET_LVL
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#define CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0 CONFIG_ESP_BROWNOUT_DET_LVL_SEL_0
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#define CONFIG_ESP32_DEBUG_OCDAWARE CONFIG_ESP_DEBUG_OCDAWARE
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#define CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY
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#define CONFIG_ESP32_DEFAULT_CPU_FREQ_160 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160
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#define CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ
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#define CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY
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#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE CONFIG_ESP_COREDUMP_ENABLE_TO_NONE
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#define CONFIG_ESP32_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
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#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE
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#define CONFIG_ESP32_PHY_MAX_TX_POWER CONFIG_ESP_PHY_MAX_TX_POWER
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#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER CONFIG_ESP_PHY_MAX_WIFI_TX_POWER
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#define CONFIG_ESP32_PTHREAD_STACK_MIN CONFIG_PTHREAD_STACK_MIN
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#define CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT CONFIG_PTHREAD_TASK_CORE_DEFAULT
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#define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
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#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
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#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
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#define CONFIG_ESP32_RTC_CLK_CAL_CYCLES CONFIG_RTC_CLK_CAL_CYCLES
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#define CONFIG_ESP32_RTC_CLK_SRC_INT_RC CONFIG_RTC_CLK_SRC_INT_RC
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#define CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC CONFIG_RTC_CLK_SRC_INT_RC
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#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1 CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
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#define CONFIG_ESP32_TIME_SYSCALL_USE_RTC_HRT CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT
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#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED CONFIG_ESP_WIFI_AMPDU_RX_ENABLED
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#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED CONFIG_ESP_WIFI_AMPDU_TX_ENABLED
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#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM
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#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER
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#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM CONFIG_ESP_WIFI_DYNAMIC_TX_BUFFER_NUM
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#define CONFIG_ESP32_WIFI_ENABLED CONFIG_ESP_WIFI_ENABLED
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#define CONFIG_ESP32_WIFI_ENABLE_WPA3_OWE_STA CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA
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#define CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE CONFIG_ESP_WIFI_ENABLE_WPA3_SAE
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#define CONFIG_ESP32_WIFI_IRAM_OPT CONFIG_ESP_WIFI_IRAM_OPT
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#define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM CONFIG_ESP_WIFI_MGMT_SBUF_NUM
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#define CONFIG_ESP32_WIFI_NVS_ENABLED CONFIG_ESP_WIFI_NVS_ENABLED
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#define CONFIG_ESP32_WIFI_RX_BA_WIN CONFIG_ESP_WIFI_RX_BA_WIN
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#define CONFIG_ESP32_WIFI_RX_IRAM_OPT CONFIG_ESP_WIFI_RX_IRAM_OPT
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#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN
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#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM
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#define CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0
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#define CONFIG_ESP32_WIFI_TX_BA_WIN CONFIG_ESP_WIFI_TX_BA_WIN
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#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE CONFIG_ESP_WIFI_TX_BUFFER_TYPE
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#define CONFIG_ESP32_XTAL_FREQ CONFIG_XTAL_FREQ
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#define CONFIG_ESP32_XTAL_FREQ_40 CONFIG_XTAL_FREQ_40
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#define CONFIG_ESP_GRATUITOUS_ARP CONFIG_LWIP_ESP_GRATUITOUS_ARP
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#define CONFIG_ESP_TASK_WDT CONFIG_ESP_TASK_WDT_INIT
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#define CONFIG_FLASHMODE_DIO CONFIG_ESPTOOLPY_FLASHMODE_DIO
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#define CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR
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#define CONFIG_GARP_TMR_INTERVAL CONFIG_LWIP_GARP_TMR_INTERVAL
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#define CONFIG_INT_WDT CONFIG_ESP_INT_WDT
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#define CONFIG_INT_WDT_CHECK_CPU1 CONFIG_ESP_INT_WDT_CHECK_CPU1
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#define CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS
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#define CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE
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#define CONFIG_LOG_BOOTLOADER_LEVEL CONFIG_BOOTLOADER_LOG_LEVEL
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#define CONFIG_LOG_BOOTLOADER_LEVEL_INFO CONFIG_BOOTLOADER_LOG_LEVEL_INFO
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#define CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE
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#define CONFIG_MONITOR_BAUD CONFIG_ESPTOOLPY_MONITOR_BAUD
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#define CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES
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#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE
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#define CONFIG_OPTIMIZATION_ASSERTION_LEVEL CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL
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#define CONFIG_OPTIMIZATION_LEVEL_DEBUG CONFIG_COMPILER_OPTIMIZATION_DEFAULT
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#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
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#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
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#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
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#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
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#define CONFIG_STACK_CHECK_NONE CONFIG_COMPILER_STACK_CHECK_MODE_NONE
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#define CONFIG_SUPPORT_TERMIOS CONFIG_VFS_SUPPORT_TERMIOS
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#define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT
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#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE
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#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE
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#define CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT_INIT
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#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
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#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1
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#define CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S
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#define CONFIG_TCPIP_RECVMBOX_SIZE CONFIG_LWIP_TCPIP_RECVMBOX_SIZE
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#define CONFIG_TCPIP_TASK_AFFINITY CONFIG_LWIP_TCPIP_TASK_AFFINITY
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#define CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY
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#define CONFIG_TCPIP_TASK_STACK_SIZE CONFIG_LWIP_TCPIP_TASK_STACK_SIZE
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#define CONFIG_TCP_MAXRTX CONFIG_LWIP_TCP_MAXRTX
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#define CONFIG_TCP_MSL CONFIG_LWIP_TCP_MSL
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#define CONFIG_TCP_MSS CONFIG_LWIP_TCP_MSS
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#define CONFIG_TCP_OVERSIZE_MSS CONFIG_LWIP_TCP_OVERSIZE_MSS
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#define CONFIG_TCP_QUEUE_OOSEQ CONFIG_LWIP_TCP_QUEUE_OOSEQ
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#define CONFIG_TCP_RECVMBOX_SIZE CONFIG_LWIP_TCP_RECVMBOX_SIZE
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#define CONFIG_TCP_SND_BUF_DEFAULT CONFIG_LWIP_TCP_SND_BUF_DEFAULT
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#define CONFIG_TCP_SYNMAXRTX CONFIG_LWIP_TCP_SYNMAXRTX
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#define CONFIG_TCP_WND_DEFAULT CONFIG_LWIP_TCP_WND_DEFAULT
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#define CONFIG_TIMER_QUEUE_LENGTH CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
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#define CONFIG_TIMER_TASK_PRIORITY CONFIG_FREERTOS_TIMER_TASK_PRIORITY
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#define CONFIG_TIMER_TASK_STACK_DEPTH CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
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#define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
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#define CONFIG_TRACEMEM_RESERVE_DRAM CONFIG_ESP32_TRACEMEM_RESERVE_DRAM
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#define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
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#define CONFIG_WPA_MBEDTLS_CRYPTO CONFIG_ESP_WIFI_MBEDTLS_CRYPTO
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#define CONFIG_WPA_MBEDTLS_TLS_CLIENT CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT
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